Searched refs:LiveOutRegs (Results 1 - 6 of 6) sorted by relevance

/freebsd-12-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h88 std::set<unsigned> LiveOutRegs; member in class:llvm::SIScheduleBlock
164 std::set<unsigned> &getOutRegs() { return LiveOutRegs; }
481 for (const auto &RegMaskPair : RPTracker.getPressure().LiveOutRegs) {
H A DSIMachineScheduler.cpp347 BotRPTracker.addLiveRegs(RPTracker.getPressure().LiveOutRegs);
354 LiveOutRegs.clear();
367 // We want LiveOutRegs to contain only Regs whose content will be read after
374 // The RPTracker's LiveOutRegs has 1, 3, (some correct or incorrect)4, 5, 7
377 for (const auto &RegMaskPair : RPTracker.getPressure().LiveOutRegs) {
383 LiveOutRegs.insert(Reg);
607 for (unsigned Reg : LiveOutRegs)
/freebsd-12-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterPressure.cpp107 for (const RegisterMaskPair &P : LiveOutRegs) {
181 LiveOutRegs.clear();
189 LiveOutRegs.clear();
337 assert(P.LiveOutRegs.empty() && "inconsistent max pressure result");
338 P.LiveOutRegs.reserve(LiveRegs.size());
339 LiveRegs.appendTo(P.LiveOutRegs);
362 for (const RegisterMaskPair &Pair : P.LiveOutRegs) {
740 discoverLiveInOrOut(Pair, P.LiveOutRegs);
H A DMachinePipeliner.cpp1549 SmallVector<RegisterMaskPair, 8> LiveOutRegs; local
1571 LiveOutRegs.push_back(RegisterMaskPair(Reg,
1576 LiveOutRegs.push_back(RegisterMaskPair(*Units,
1580 RPTracker.addLiveRegs(LiveOutRegs);
H A DMachineScheduler.cpp1013 BotRPTracker.addLiveRegs(RPTracker.getPressure().LiveOutRegs);
1030 updatePressureDiffs(RPTracker.getPressure().LiveOutRegs);
1325 for (const RegisterMaskPair &P : RPTracker.getPressure().LiveOutRegs) {
/freebsd-12-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterPressure.h54 SmallVector<RegisterMaskPair,8> LiveOutRegs; member in struct:llvm::RegisterPressure

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