Searched refs:ImpDef (Results 1 - 6 of 6) sorted by relevance

/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp88 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs())
89 for (; *ImpDef; ++ImpDef) {
90 unsigned R = *ImpDef;
/freebsd-11.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp443 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) {
444 if (Reg == *ImpDef)
H A DScheduleDAGRRList.cpp1209 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) {
1210 if (Reg == *ImpDef)
2742 for (const MCPhysReg *ImpDef = ImpDefs; *ImpDef; ++ImpDef)
2746 if (TRI->regsOverlap(*ImpDef, PI->getReg()) &&
/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp392 MachineSDNode *ImpDef = CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, local
395 RegSeqArgs[1 + (2 * i)] = SDValue(ImpDef, 0);
/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp893 for (unsigned ImpDef : ImpDefs)
894 MIB.addReg(ImpDef, RegState::ImplicitDefine);
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp762 SDValue ImpDef = SDValue( local
765 TargetOpcode::INSERT_SUBREG, dl, MVT::i64, ImpDef, N, SubReg);

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