Searched refs:FSR (Results 1 - 5 of 5) sorted by relevance

/freebsd-11.0-release/contrib/llvm/tools/clang/lib/Analysis/
H A DPrintfFormatString.cpp332 const PrintfSpecifierResult &FSR = ParsePrintfSpecifier(H, I, E, argIndex, local
337 if (FSR.shouldStop())
341 if (!FSR.hasValue())
344 if (!H.HandlePrintfSpecifier(FSR.getValue(), FSR.getStart(),
345 I - FSR.getStart()))
362 const PrintfSpecifierResult &FSR = ParsePrintfSpecifier(H, I, E, argIndex, local
367 if (FSR.shouldStop())
371 if (!FSR.hasValue())
373 const analyze_printf::PrintfSpecifier &FS = FSR
[all...]
H A DScanfFormatString.cpp535 const ScanfSpecifierResult &FSR = ParseScanfSpecifier(H, I, E, argIndex, local
539 if (FSR.shouldStop())
543 if (!FSR.hasValue())
546 if (!H.HandleScanfSpecifier(FSR.getValue(), FSR.getStart(),
547 I - FSR.getStart())) {
/freebsd-11.0-release/sys/mips/include/
H A Dregnum.h162 #define FSR (FPBASE+32) macro
/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp783 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; local
791 FR = RO.getReg(), FSR = RO.getSubReg();
800 FR = SR, FSR = SSR;
817 .addReg(FR, 0, FSR);
/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp809 case Sparc::FSR:
939 RegNo = Sparc::FSR;

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