Searched refs:FP (Results 1 - 25 of 72) sorted by relevance

123

/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonEarlyIfConv.cpp119 : FP(P), TRI(T) {}
120 const FlowPattern &FP; member in struct:__anon2847::PrintFP
127 OS << "{ SplitB:" << PrintMB(P.FP.SplitB)
128 << ", PredR:" << PrintReg(P.FP.PredR, &P.TRI)
129 << ", TrueB:" << PrintMB(P.FP.TrueB) << ", FalseB:"
130 << PrintMB(P.FP.FalseB)
131 << ", JoinB:" << PrintMB(P.FP.JoinB) << " }";
159 FlowPattern &FP);
167 bool isValid(const FlowPattern &FP) const;
170 bool isProfitable(const FlowPattern &FP) cons
215 matchFlowPattern(MachineBasicBlock *B, MachineLoop *L, FlowPattern &FP) argument
775 updatePhiNodes(MachineBasicBlock *WhereB, const FlowPattern &FP) argument
825 convert(const FlowPattern &FP) argument
1012 simplifyFlowGraph(const FlowPattern &FP) argument
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H A DHexagonExpandPredSpillCode.cpp244 unsigned FP = MI->getOperand(0).getReg(); local
245 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
259 .addReg(FP).addReg(HEXAGON_RESERVED_REG_1);
268 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
282 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2);
291 unsigned FP = MI->getOperand(1).getReg(); local
292 assert(FP == QST.getRegisterInfo()->getFrameRegister() &&
303 .addReg(FP)
313 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset);
323 HEXAGON_RESERVED_REG_2).addReg(FP)
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/freebsd-11.0-release/contrib/binutils/opcodes/
H A Dalpha-opc.c350 #define FP(oo,fff) FP_(oo,fff), FP_MASK
667 { "itofs", FP(0x14,0x004), CIX, { RA, ZB, FC } },
668 { "sqrtf/c", FP(0x14,0x00A), CIX, ARG_FPZ1 },
669 { "sqrts/c", FP(0x14,0x00B), CIX, ARG_FPZ1 },
670 { "itoff", FP(0x14,0x014), CIX, { RA, ZB, FC } },
671 { "itoft", FP(0x14,0x024), CIX, { RA, ZB, FC } },
672 { "sqrtg/c", FP(0x14,0x02A), CIX, ARG_FPZ1 },
673 { "sqrtt/c", FP(0x14,0x02B), CIX, ARG_FPZ1 },
674 { "sqrts/m", FP(0x14,0x04B), CIX, ARG_FPZ1 },
675 { "sqrtt/m", FP(
347 #define FP macro
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/freebsd-11.0-release/sys/arm/include/
H A Dstack.h53 #define FP 11 macro
/freebsd-11.0-release/contrib/llvm/lib/Target/
H A DTargetSubtargetInfo.cpp27 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
28 : MCSubtargetInfo(TT, CPU, FS, PF, PD, ProcSched, WPR, WL, RA, IS, OC, FP) {
22 TargetSubtargetInfo( const Triple &TT, StringRef CPU, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) argument
/freebsd-11.0-release/etc/rc.d/
H A Dipsec50 ${ipsec_program} -FP
/freebsd-11.0-release/contrib/libc++/src/
H A Dchrono.cpp119 typedef steady_clock::rep (*FP)(); typedef in class:chrono::steady_clock
122 FP
137 static FP fp = init_steady_clock();
/freebsd-11.0-release/contrib/llvm/include/llvm/Analysis/
H A DRegionPass.h117 Pass *FP = static_cast<Pass *>(PassVector[N]);
118 return FP;
/freebsd-11.0-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.cpp43 MSP430::FP, MSP430::R5, MSP430::R6, MSP430::R7,
53 MSP430::FP, MSP430::R5, MSP430::R6, MSP430::R7,
91 Reserved.set(MSP430::FP);
116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP);
125 Offset += 2; // Skip the saved FP
160 return TFI->hasFP(MF) ? MSP430::FP : MSP430::SP;
H A DMSP430FrameLowering.cpp67 // Save FP into the appropriate stack slot...
69 .addReg(MSP430::FP, RegState::Kill);
71 // Update FP with the new base value...
72 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FP)
78 I->addLiveIn(MSP430::FP);
136 // pop FP.
137 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FP);
159 TII.get(MSP430::MOV16rr), MSP430::SP).addReg(MSP430::FP);
292 // Create a frame entry for the FP register that must be saved.
297 "Slot for FP registe
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/freebsd-11.0-release/contrib/llvm/lib/Target/WebAssembly/InstPrinter/
H A DWebAssemblyInstPrinter.cpp112 static std::string toString(const APFloat &FP) { argument
115 if (FP.isNaN())
116 assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
117 FP.bitwiseIsEqual(
118 APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
121 auto Written = FP.convertToHexString(
/freebsd-11.0-release/sys/arm/arm/
H A Ddb_trace.c88 state->registers[SP], state->registers[FP]);
92 ~((1 << SP) | (1 << FP) | (1 << LR) | (1 << PC));
162 state.registers[FP] = ctx->pcb_regs.sf_r11;
182 state.registers[FP] = (uint32_t)__builtin_frame_address(0);
/freebsd-11.0-release/tools/regression/ipsec/
H A Dipsec6.t66 setkey -FP
101 setkey -FP
H A Dipsec.t66 setkey -FP
101 setkey -FP
/freebsd-11.0-release/contrib/llvm/lib/MC/
H A DMCSubtargetInfo.cpp44 const InstrStage *IS, const unsigned *OC, const unsigned *FP)
47 ReadAdvanceTable(RA), Stages(IS), OperandCycles(OC), ForwardingPaths(FP) {
39 MCSubtargetInfo( const Triple &TT, StringRef C, StringRef FS, ArrayRef<SubtargetFeatureKV> PF, ArrayRef<SubtargetFeatureKV> PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP) argument
/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.cpp185 // Reserve FP if this function should have a dedicated frame pointer register.
190 Reserved.set(Mips::FP);
292 return TFI->hasFP(MF) ? (IsN64 ? Mips::FP_64 : Mips::FP) :
308 unsigned FP = Subtarget.isGP32bit() ? Mips::FP : Mips::FP_64; local
317 if (!MF.getRegInfo().canReserveReg(FP))
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp115 Reserved.set(AArch64::FP);
147 case AArch64::FP:
177 // large enough that referencing from the FP won't result in things being
204 return TFI->hasFP(MF) ? AArch64::FP : AArch64::SP;
222 // FP when there's no better way to access it (SP or base pointer).
242 /// reference would be better served by a base register other than FP
274 // FP, LR, X19-X28, D8-D15. 64-bits each.
287 // The FP is only available if there is no dynamic realignment. We
290 if (TFI->hasFP(MF) && isFrameOffsetLegal(MI, AArch64::FP, FPOffset))
417 - (TFI->hasFP(MF) || TT.isOSDarwin()) // FP
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/freebsd-11.0-release/sys/crypto/des/
H A Ddes_enc.c162 FP(r,l);
274 FP(r,l);
294 FP(r,l);
/freebsd-11.0-release/contrib/llvm/lib/IR/
H A DLegacyPassManager.cpp283 FPPassManager *FP = static_cast<FPPassManager *>(PassManagers[N]);
284 return FP;
1472 FunctionPass *FP = getContainedPass(Index); local
1473 AnalysisResolver *AR = FP->getResolver();
1518 FunctionPass *FP = getContainedPass(Index); local
1519 FP->dumpPassStructure(Offset + 1);
1520 dumpLastUses(FP, Offset+1);
1538 FunctionPass *FP = getContainedPass(Index); local
1541 dumpPassInfo(FP, EXECUTION_MSG, ON_FUNCTION_MSG, F.getName());
1542 dumpRequiredSet(FP);
[all...]
/freebsd-11.0-release/contrib/gdb/gdb/
H A Dsparc-stub.c113 I0, I1, I2, I3, I4, I5, FP, I7, enumerator in enum:regnames
608 *ptr++ = hexchars[FP >> 4];
609 *ptr++ = hexchars[FP & 0xf];
611 ptr = mem2hex(sp + 8 + 6, ptr, 4, 0); /* FP */
/freebsd-11.0-release/crypto/openssl/crypto/des/
H A Ddes_enc.c148 FP(r, l);
254 FP(r, l);
274 FP(r, l);
/freebsd-11.0-release/contrib/llvm/include/llvm/MC/
H A DMCSubtargetInfo.h59 const unsigned *OC, const unsigned *FP);
/freebsd-11.0-release/contrib/llvm/include/llvm/Target/
H A DTargetSubtargetInfo.h58 const unsigned *OC, const unsigned *FP);
/freebsd-11.0-release/contrib/llvm/tools/bugpoint/
H A DExtractFunction.cpp269 Constant *FP = CS->getOperand(1); local
270 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP))
272 FP = CE->getOperand(0);
273 if (Function *F = dyn_cast<Function>(FP)) {
/freebsd-11.0-release/sys/cddl/dev/dtrace/arm/
H A Ddtrace_isa.c83 state.registers[FP] = (uint32_t)__builtin_frame_address(0);
152 state.registers[FP] = (uint32_t)__builtin_frame_address(0);

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