/freebsd-11.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86CallingConv.h | 27 ISD::ArgFlagsTy &ArgFlags, 32 ArgFlags.setInReg(); 49 ISD::ArgFlagsTy &ArgFlags, 62 if (ArgFlags.isSplit() || !PendingMembers.empty()) { 65 if (!ArgFlags.isSplitEnd()) 79 assert(ArgFlags.isSplitEnd()); 24 CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 46 CC_X86_32_MCUInReg(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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/freebsd-11.0-release/contrib/llvm/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 47 ISD::ArgFlagsTy ArgFlags) { 48 unsigned Align = ArgFlags.getByValAlign(); 49 unsigned Size = ArgFlags.getByValSize(); 76 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; local 77 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { 94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 95 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) 108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 109 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { 126 ISD::ArgFlagsTy ArgFlags local 44 HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags) argument 144 ISD::ArgFlagsTy ArgFlags = Flags[i]; local [all...] |
/freebsd-11.0-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64CallingConvention.h | 45 MVT LocVT, ISD::ArgFlagsTy &ArgFlags, 50 unsigned Align = std::min(ArgFlags.getOrigAlign(), StackAlign); 67 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 75 if (!ArgFlags.isInConsecutiveRegsLast()) 78 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, 8); 86 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 112 if (!ArgFlags.isInConsecutiveRegsLast()) 134 return finishStackBlock(PendingMembers, LocVT, ArgFlags, State, SlotAlign); 44 finishStackBlock(SmallVectorImpl<CCValAssign> &PendingMembers, MVT LocVT, ISD::ArgFlagsTy &ArgFlags, CCState &State, unsigned SlotAlign) argument 65 CC_AArch64_Custom_Stack_Block( unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 84 CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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H A D | AArch64ISelLowering.cpp | 2905 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 2908 bool Res = AssignFn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, CCInfo); 2927 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 2935 bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, ArgFlags, CCInfo);
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/freebsd-11.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.h | 60 ISD::ArgFlagsTy &ArgFlags, 114 ISD::ArgFlagsTy &ArgFlags, 146 ISD::ArgFlagsTy &ArgFlags, 157 ISD::ArgFlagsTy &ArgFlags, 159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, 182 ISD::ArgFlagsTy &ArgFlags, 195 ArgFlags.getOrigAlign())); 197 if (!ArgFlags.isInConsecutiveRegsLast()) 58 CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 112 CC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 144 RetCC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 155 RetCC_ARM_AAPCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 179 CC_ARM_AAPCS_Custom_Aggregate(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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H A D | ARMFastISel.cpp | 200 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1880 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1887 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, 2214 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 2218 ArgFlags.reserve(I->getNumOperands()); 2235 ArgFlags.push_back(Flags); 2241 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, 2325 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 2330 ArgFlags.reserve(arg_size); 2368 ArgFlags 1877 ProcessCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool isVarArg) argument [all...] |
/freebsd-11.0-release/contrib/llvm/tools/clang/include/clang/Basic/ |
H A D | IdentifierTable.h | 621 ArgFlags = ZeroArg|OneArg enumerator in enum:clang::Selector::IdentifierInfoFlag 627 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); 633 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); 639 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); 643 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); 647 return InfoPtr & ArgFlags;
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/freebsd-11.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 107 ISD::ArgFlagsTy ArgFlags, CCState &State); 112 ISD::ArgFlagsTy ArgFlags, CCState &State); 117 ISD::ArgFlagsTy ArgFlags, CCState &State); 122 ISD::ArgFlagsTy ArgFlags, CCState &State); 127 ISD::ArgFlagsTy ArgFlags, CCState &State); 132 ISD::ArgFlagsTy ArgFlags, CCState &State); 137 ISD::ArgFlagsTy ArgFlags, CCState &State); 142 ISD::ArgFlagsTy ArgFlags, CCState &State); 147 ISD::ArgFlagsTy ArgFlags, CCState &State) { 152 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, Stat 145 CC_Hexagon_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 220 CC_Hexagon(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 272 CC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 290 CC_Hexagon64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 315 CC_HexagonVector(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 384 RetCC_Hexagon(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 443 RetCC_Hexagon32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 459 RetCC_Hexagon64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 474 RetCC_HexagonVector(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument [all...] |
/freebsd-11.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 177 ISD::ArgFlagsTy ArgFlags, CCState &State); 184 ISD::ArgFlagsTy &ArgFlags, CCState &State); 443 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
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/freebsd-11.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 886 ISD::ArgFlagsTy &ArgFlags, 892 ISD::ArgFlagsTy &ArgFlags, 898 ISD::ArgFlagsTy &ArgFlags,
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H A D | PPCFastISel.cpp | 182 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1265 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, 1277 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); 1496 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; local 1501 ArgFlags.reserve(NumArgs); 1527 ArgFlags.push_back(Flags); 1534 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, 1262 processCallArgs(SmallVectorImpl<Value*> &Args, SmallVectorImpl<unsigned> &ArgRegs, SmallVectorImpl<MVT> &ArgVTs, SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, SmallVectorImpl<unsigned> &RegArgs, CallingConv::ID CC, unsigned &NumBytes, bool IsVarArg) argument
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H A D | PPCISelLowering.cpp | 2568 ISD::ArgFlagsTy &ArgFlags, 2576 ISD::ArgFlagsTy &ArgFlags, 2603 ISD::ArgFlagsTy &ArgFlags, 4552 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; local 4556 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, 4560 ArgFlags, CCInfo); 2566 CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 2573 CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 2600 CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 301 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; local 308 if (ArgFlags.isSExt()) 310 else if (ArgFlags.isZExt()) 317 if (ArgFlags.isByVal()) { 318 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); 339 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State);
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/freebsd-11.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2355 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 2364 if (ArgFlags.isByVal()) 2368 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { 2371 if (ArgFlags.isSExt()) 2373 else if (ArgFlags.isZExt()) 2383 if (ArgFlags.isSExt()) 2385 else if (ArgFlags.isZExt()) 2398 unsigned OrigAlign = ArgFlags.getOrigAlign(); 2445 ISD::ArgFlagsTy ArgFlags, CCState &State) { 2448 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, Stat 2354 CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State, ArrayRef<MCPhysReg> F64Regs) argument 2443 CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 2451 CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument [all...] |
H A D | MipsFastISel.cpp | 211 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, 216 ISD::ArgFlagsTy ArgFlags, CCState &State) { 222 ISD::ArgFlagsTy ArgFlags, CCState &State) { 214 CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument 220 CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State) 43 assert (ArgFlags.isSRet()); 54 ISD::ArgFlagsTy &ArgFlags, CCState &State) 82 ISD::ArgFlagsTy &ArgFlags, CCState &State) 106 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 151 ISD::ArgFlagsTy &ArgFlags, CCState &State) { 39 CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 52 CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 80 CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 104 CC_Sparc64_Full(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument 149 CC_Sparc64_Half(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State) argument
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/freebsd-11.0-release/contrib/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelLowering.cpp | 36 ISD::ArgFlagsTy ArgFlags, CCState &State) { 38 ArgFlags.getOrigAlign()); 34 allocateStack(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State) argument
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