Searched refs:AR_DIAG_SW (Results 1 - 25 of 31) sorted by relevance

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/freebsd-11.0-release/sys/dev/ath/ath_hal/ar5211/
H A Dar5211_recv.c75 , OS_REG_READ(ah, AR_DIAG_SW)
90 OS_REG_WRITE(ah, AR_DIAG_SW,
91 OS_REG_READ(ah, AR_DIAG_SW) & ~(AR_DIAG_SW_DIS_RX));
100 OS_REG_WRITE(ah, AR_DIAG_SW,
101 OS_REG_READ(ah, AR_DIAG_SW) | AR_DIAG_SW_DIS_RX);
H A Dar5211_reset.c358 OS_REG_WRITE(ah, AR_DIAG_SW,
359 OS_REG_READ(ah, AR_DIAG_SW) | AR5311_DIAG_SW_USE_ECO);
539 OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg);
H A Dar5211_misc.c657 OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg);
H A Dar5211reg.h256 #define AR_DIAG_SW 0x8048 /* PCU control register */ macro
/freebsd-11.0-release/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_recv.c72 OS_REG_SET_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
77 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
86 OS_REG_CLR_BIT(ah, AR_DIAG_SW,
97 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
154 OS_REG_READ(ah, AR_DIAG_SW));
179 OS_REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
188 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
H A Dar9300_tx99_tgt.c504 OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) &~ AR_DIAG_RX_DIS);
505 //OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) | (AR_DIAG_FORCE_RX_CLEAR+AR_DIAG_IGNORE_VIRT_CS));
523 OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) &~ (AR_DIAG_FORCE_RX_CLEAR | AR_DIAG_IGNORE_VIRT_CS));
H A Dar9300_xmit.c693 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
712 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
798 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
817 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
877 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH | AR_DIAG_RX_DIS |
938 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH | AR_DIAG_RX_DIS |
H A Dar9300_xmit_ds.c487 OS_REG_WRITE(ah, AR_DIAG_SW,
488 (OS_REG_READ(ah, AR_DIAG_SW) |
554 OS_REG_WRITE(ah, AR_DIAG_SW,
555 (OS_REG_READ(ah, AR_DIAG_SW) &
H A Dar9300_misc.c1003 OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg);
1883 val = OS_REG_READ(ah, AR_DIAG_SW);
1908 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_CTL_LOW);
1910 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_CTL_LOW);
1914 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_EXT_LOW);
1916 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_CLEAR_EXT_LOW);
3814 OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) &~ AR_DIAG_RX_DIS);
3835 OS_REG_WRITE(ah, AR_DIAG_SW, OS_REG_READ(ah, AR_DIAG_SW) | AR_DIAG_RX_DI
[all...]
H A Dar9300_mci.c495 OS_REG_WRITE(ah, AR_DIAG_SW, 0x080c0000);
549 OS_REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL1, 0x03);
550 OS_REG_RMW_FIELD(ah, AR_DIAG_SW, AR_DIAG_OBS_PT_SEL2, 0x01);
/freebsd-11.0-release/sys/dev/ath/ath_hal/ar5212/
H A Dar5212_recv.c76 OS_REG_READ(ah, AR_DIAG_SW));
93 OS_REG_WRITE(ah, AR_DIAG_SW,
94 OS_REG_READ(ah, AR_DIAG_SW) &~ AR_DIAG_RX_DIS);
107 OS_REG_WRITE(ah, AR_DIAG_SW,
108 OS_REG_READ(ah, AR_DIAG_SW) | AR_DIAG_RX_DIS);
H A Dar5212_xmit.c646 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_CHAN_IDLE);
666 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_CHAN_IDLE);
H A Dar5212reg.h271 #define AR_DIAG_SW 0x8048 /* MAC PCU control register */ macro
/freebsd-11.0-release/sys/dev/ath/ath_hal/ar5210/
H A Dar5210_recv.c78 ath_hal_printf(ah, "AR_DIAG_SW=0x%x\n", OS_REG_READ(ah, AR_DIAG_SW));
90 OS_REG_READ(ah, AR_DIAG_SW) & ~(AR_DIAG_SW_DIS_RX));
100 OS_REG_READ(ah, AR_DIAG_SW) | AR_DIAG_SW_DIS_RX);
H A Dar5210reg.h93 #define AR_DIAG_SW 0x8068 /* PCU control */ macro
H A Dar5210_reset.c463 OS_REG_READ(ah, AR_DIAG_SW) | (AR_DIAG_SW_DIS_TX | AR_DIAG_SW_DIS_RX));
560 OS_REG_READ(ah, AR_DIAG_SW) & ~(AR_DIAG_SW_DIS_TX | AR_DIAG_SW_DIS_RX));
H A Dar5210_misc.c702 OS_REG_WRITE(ah, AR_DIAG_SW, val);
/freebsd-11.0-release/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_recv.c86 OS_REG_READ(ah, AR_DIAG_SW));
119 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
129 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
H A Dar5416_misc.c380 val = OS_REG_READ(ah, AR_DIAG_SW);
405 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_CTL_LOW);
407 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_CTL_LOW);
411 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_EXT_LOW);
413 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RXCLEAR_EXT_LOW);
H A Dar5416_xmit.c93 OS_REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_CHAN_IDLE);
110 OS_REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_CHAN_IDLE);
/freebsd-11.0-release/tools/tools/ath/common/
H A Ddumpregs_5210.c98 DEFBASICfmt(AR_DIAG_SW, "DIAG_SW", AR_DIAG_SW_BITS),
H A Ddumpregs_5211.c255 DEFBASICfmt(AR_DIAG_SW, "DIAG_SW", AR_DIAG_SW_BITS),
H A Ddumpregs_5212.c294 DEFBASICfmt(AR_DIAG_SW, "DIAG_SW",
H A Ddumpregs_5416.c329 DEFBASICfmt(AR_DIAG_SW, "DIAG_SW",
/freebsd-11.0-release/sys/dev/ath/ath_hal/ar5312/
H A Dar5312_reset.c557 OS_REG_WRITE(ah, AR_DIAG_SW, AH_PRIVATE(ah)->ah_diagreg);

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