Searched refs:link_width_cntl (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Drv770.c1224 u32 link_width_cntl, lanes, speed_cntl, tmp; local
1252 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
1253 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
1254 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
1255 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
1256 if (link_width_cntl & LC_RENEGOTIATION_SUPPORT) {
1257 lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT;
1258 link_width_cntl &= ~(LC_LINK_WIDTH_MASK |
1260 link_width_cntl |= lanes | LC_RECONFIG_NOW |
1262 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
[all...]
H A Dr300.c471 uint32_t link_width_cntl, mask; local
506 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
508 if ((link_width_cntl & RADEON_PCIE_LC_LINK_WIDTH_RD_MASK) ==
512 link_width_cntl &= ~(RADEON_PCIE_LC_LINK_WIDTH_MASK |
516 link_width_cntl |= mask;
517 WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
518 WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, (link_width_cntl |
522 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
523 while (link_width_cntl == 0xffffffff)
524 link_width_cntl
530 u32 link_width_cntl; local
[all...]
H A Dr600.c4144 u32 link_width_cntl, mask, target_reg; local
4183 link_width_cntl = RREG32_PCIE_P(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
4185 if ((link_width_cntl & RADEON_PCIE_LC_LINK_WIDTH_RD_MASK) ==
4189 if (link_width_cntl & R600_PCIE_LC_UPCONFIGURE_DIS)
4192 link_width_cntl &= ~(RADEON_PCIE_LC_LINK_WIDTH_MASK |
4196 link_width_cntl |= mask;
4198 WREG32_PCIE_P(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
4204 if (link_width_cntl & R600_PCIE_LC_RENEGOTIATION_SUPPORT)
4205 link_width_cntl |= R600_PCIE_LC_RENEGOTIATE_EN | R600_PCIE_LC_UPCONFIGURE_SUPPORT;
4207 link_width_cntl |
4226 u32 link_width_cntl; local
4261 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; local
[all...]
H A Devergreen.c3805 u32 link_width_cntl, speed_cntl, mask; local
3839 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
3840 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
3841 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
3860 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
3863 link_width_cntl |= LC_UPCONFIGURE_DIS;
3865 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
3866 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);

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