Searched refs:link_bw (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/
H A Ddrm_dp_helper.c144 int drm_dp_bw_code_to_link_rate(u8 link_bw) argument
146 switch (link_bw) {
H A Ddrm_dp_helper.h342 int drm_dp_bw_code_to_link_rate(u8 link_bw);
/freebsd-11-stable/sys/dev/drm2/i915/
H A Dintel_dp.c114 int *lane_num, int *link_bw)
119 *link_bw = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
152 intel_dp_link_clock(uint8_t link_bw) argument
154 if (link_bw == DP_LINK_BW_2_7)
717 intel_dp->link_bw = bws[clock];
719 adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
722 intel_dp->link_bw, intel_dp->lane_count,
841 intel_dp->link_configuration[0] = intel_dp->link_bw;
113 intel_edp_link_config(struct intel_encoder *intel_encoder, int *lane_num, int *link_bw) argument
H A Dintel_drv.h385 uint8_t link_bw; member in struct:intel_dp
588 extern int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp);
H A Dintel_ddi.c847 switch (intel_dp->link_bw) {
859 intel_dp->link_bw);
H A Dintel_display.c5402 int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp) argument
5410 return bps / (link_bw * 8) + 1;
5423 int target_clock, pixel_multiplier, lane, link_bw; local
5446 intel_edp_link_config(edp_encoder, &lane, &link_bw);
5455 link_bw = intel_fdi_link_freq(dev) * MHz(100)/KHz(1)/10;
5467 lane = ironlake_get_lanes_required(target_clock, link_bw,
5473 link_bw *= pixel_multiplier;
5474 ironlake_compute_m_n(intel_crtc->bpp, lane, target_clock, link_bw,

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