Searched refs:isThumb1 (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLoadStoreOptimizer.cpp113 bool isThumb1, isThumb2; member in struct:__anon2164::ARMLoadStoreOpt
487 assert(isThumb1 && "Can only update base register uses for Thumb1!");
634 bool SafeToClobberCPSR = !isThumb1 ||
638 bool Writeback = isThumb1; // Thumb1 LDM/STM have base reg writeback.
643 if (isThumb1 && ContainsReg(Regs, Base)) {
654 bool haveIBAndDA = isNotVFP && !isThumb2 && !isThumb1;
660 } else if (Offset == -4 * (int)NumRegs && isNotVFP && !isThumb1) {
694 NewBase = findFreeReg(isThumb1 ? ARM::tGPRRegClass : ARM::GPRRegClass);
701 : (isThumb1 && Base == ARM::SP)
703 : (isThumb1
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H A DARMConstantIslandPass.cpp220 bool isThumb1; member in class:__anon2147::ARMConstantIslands
363 isThumb1 = AFI->isThumb1OnlyFunction();
367 bool GenerateTBB = isThumb2 || (isThumb1 && SynthesizeThumb1TBB);
658 return isThumb1 ? Align(4) : Align(1);
660 return isThumb1 ? Align(4) : Align(2);
1282 unsigned Delta = isThumb1 ? 2 : 4;
1624 if (!isThumb1)
H A DARMBaseInstrInfo.cpp1511 bool isThumb1 = Subtarget.isThumb1Only(); local
1519 if (isThumb1 || !MI->getOperand(1).isDead()) {
1522 : isThumb1 ? ARM::tLDMIA_UPD
1529 if (isThumb1 || !MI->getOperand(0).isDead()) {
1532 : isThumb1 ? ARM::tSTMIA_UPD
H A DARMISelLowering.cpp10838 bool isThumb1 = Subtarget->isThumb1Only(); local
10855 Register TmpReg = MRI.createVirtualRegister(isThumb1 ? &ARM::tGPRRegClass

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