Searched refs:isSub (Results 1 - 9 of 9) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMAddressingModes.h | 402 bool isSub = Opc == sub;
403 return Imm12 | ((int)isSub << 12) | (SO << 13) | (IdxMode << 16) ;
433 bool isSub = Opc == sub;
434 return ((int)isSub << 8) | Offset | (IdxMode << 9);
476 bool isSub = Opc == sub;
477 return ((int)isSub << 8) | Offset;
497 bool isSub = Opc == sub;
498 return ((int)isSub << 8) | Offset;
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| H A D | ARMInstPrinter.cpp | 363 bool isSub = OffImm < 0;
368 if (isSub) {
1191 bool isSub = OffImm < 0;
1195 if (isSub) {
1215 bool isSub = OffImm < 0;
1219 if (isSub) {
1244 bool isSub = OffImm < 0;
1251 if (isSub) {
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ThumbRegisterInfo.cpp | 133 bool isSub = false; local
139 isSub = true;
170 int Opc = (isSub) ? ARM::tSUBrr
175 if (DestReg == ARM::SP || isSub)
193 bool isSub = NumBytes < 0;
195 if (isSub) Bytes = -NumBytes;
228 ExtraOpc = isSub ? ARM::tSUBspi : ARM::tADDspi;
234 assert(!isSub && "Thumb1 does not have tSUBrSPi");
243 CopyOpc = isSub ? ARM::tSUBi3 : ARM::tADDi3;
251 ExtraOpc = isSub
[all...] |
| H A D | Thumb2InstrInfo.cpp | 244 bool isSub = NumBytes < 0;
245 if (isSub) NumBytes = -NumBytes;
269 if (isSub) {
312 Opc = isSub ? ARM::tSUBspi : ARM::tADDspi;
327 Opc = isSub ? t2SUB : t2ADD;
334 Opc = isSub ? t2SUBi12 : t2ADDi12;
480 bool isSub = false;
512 isSub = true;
531 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12
588 isSub
[all...] |
| H A D | ARMBaseInstrInfo.cpp | 183 bool isSub = ARM_AM::getAM2Op(OffImm) == ARM_AM::sub; local
191 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
200 get(isSub ? ARM::SUBrsi : ARM::ADDrsi), WBReg)
209 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
217 bool isSub = ARM_AM::getAM3Op(OffImm) == ARM_AM::sub; local
222 get(isSub ? ARM::SUBri : ARM::ADDri), WBReg)
229 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg)
583 bool isSub = ARM_AM::getAM3Op(OpcImm) == ARM_AM::sub; local
584 return (isSub && Offset.getReg() != 0);
2370 bool isSub local
2523 bool isSub = false; local
3342 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
3358 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
3386 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
3399 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
3450 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
4107 bool isSub = ARM_AM::getAM2Op(ShOpVal) == ARM_AM::sub; local
[all...] |
| H A D | ARMISelLowering.cpp | 10588 bool isSub = ARM_AM::getAM2Op(Offset) == ARM_AM::sub; local
10590 if (isSub)
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 87 bool isSub = Val < 0; local
88 if (isSub) {
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 253 bool isSub = NumBytes < 0; local
254 uint64_t Offset = isSub ? -NumBytes : NumBytes;
256 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy;
266 if (isSub && !isEAXLiveIn(MBB))
273 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit);
297 if (isSub)
324 unsigned Reg = isSub
328 unsigned Opc = isSub
332 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
[all...] |
| /freebsd-11-stable/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprScalar.cpp | 3396 bool isSub=false) {
3412 return buildFMulAdd(LHSBinOp, op.RHS, CGF, Builder, false, isSub);
3417 return buildFMulAdd(RHSBinOp, op.LHS, CGF, Builder, isSub, false);
3394 tryEmitFMulAdd(const BinOpInfo &op, const CodeGenFunction &CGF, CGBuilderTy &Builder, bool isSub=false) argument
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