Searched refs:isSEXTLoad (Results 1 - 3 of 3) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8415 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N))
8506 assert((ISD::isSEXTLoad(LD) || ISD::isZEXTLoad(LD)) &&
8511 unsigned Opcode = ISD::isSEXTLoad(LD) ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
15366 bool isSEXTLoad, SDValue &Base,
15372 if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) {
15425 bool isSEXTLoad, SDValue &Base,
15450 bool isSEXTLoad, bool IsMasked, bool isLE,
15516 bool isSEXTLoad = false; local
15522 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
15531 isSEXTLoad
15365 getARMIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
15424 getT2IndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
15449 getMVEIndexedAddressParts(SDNode *Ptr, EVT VT, unsigned Align, bool isSEXTLoad, bool IsMasked, bool isLE, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
15574 bool isSEXTLoad = false, isNonExt; local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 2622 inline bool isSEXTLoad(const SDNode *N) { function in namespace:llvm::ISD
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 5407 (ISD::isSEXTLoad(N0.getNode()) && N0.hasOneUse()))) {
9479 bool isAExtLoad = (ExtLoadType == ISD::SEXTLOAD) ? ISD::isSEXTLoad(N0Node)
|
Completed in 213 milliseconds