Searched refs:isDef (Results 1 - 25 of 164) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/GlobalISel/
H A DGIMatchDag.cpp62 if (E->getFromMO()->isDef() && !E->getToMO()->isDef())
66 if (E->getFromMO()->isDef() && !E->getToMO()->isDef())
70 if (E->getFromMO()->isDef() == E->getToMO()->isDef())
73 if (E->getFromMO()->isDef() == E->getToMO()->isDef())
75 else if (E->getFromMO()->isDef() && !E->getToMO()->isDef())
[all...]
H A DGIMatchDagEdge.cpp23 return FromMO->isDef();
H A DGIMatchDagOperands.cpp35 I.value().isDef());
46 if (I.isDef())
H A DGIMatchDagOperands.h56 bool isDef() const { return IsDef; } function in class:llvm::GIMatchDagOperand
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRegUnits.cpp52 if (MOP.isDef())
71 if (!MOP.isDef() && !MOP.readsReg())
H A DImplicitNullChecks.cpp289 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef()))
443 assert(!(DependenceMO.isDef() &&
602 return MO.isReg() && MO.getReg() && MO.isDef() &&
649 assert(MO.isDef() && "Expected def or use");
691 if (!MO.isReg() || !MO.isDef())
701 if (!MO.isReg() || !MO.getReg() || !MO.isDef() || MO.isDead())
H A DDeadMachineInstructionElim.cpp78 if (MO.isReg() && MO.isDef()) {
152 if (MO.isReg() && MO.isDef()) {
H A DMIRCanonicalizerPass.cpp173 if (!MO.isDef())
189 if (!MO.isDef())
357 if (!MO.isDef() && MO.isKill()) {
362 if (MO.isDef() && MO.isDead()) {
H A DMachineInstrBundle.cpp153 if (MO.isDef()) {
297 if (MO.isDef())
302 if (MO.isDef())
344 } else if (MO.isDef()) {
H A DRenameIndependentSubregs.cpp180 if (!MO.isDef() && !MO.readsReg())
190 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber())
219 if (!MO.isDef() && !MO.readsReg())
224 Pos = MO.isDef() ? Pos.getRegSlot(MO.isEarlyClobber())
346 if (!MO.isDef())
H A DLiveRangeEdit.cpp192 if (MO.isDef()) {
292 if (VRM && MI->getOperand(0).isReg() && MI->getOperand(0).isDef() &&
316 else if (MOI->isDef())
326 if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) ||
331 if (MOI->isDef()) {
H A DLiveRangeCalc.cpp83 if (!MO.isDef() && !MO.readsReg())
99 if (MO.isDef())
107 if (MO.isDef() && !LI.hasSubRanges())
174 if (!MO.readsReg() || (IsSubRange && MO.isDef()))
180 if (MO.isDef())
192 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
200 if (MO.isDef())
H A DMachineOperand.cpp92 if (isDef())
127 if (isDef())
234 void MachineOperand::ChangeToRegister(Register Reg, bool isDef, bool isImp, argument
247 assert(!(isDead && !isDef) && "Dead flag on non-def");
248 assert(!(isKill && isDef) && "Kill flag on def");
252 IsDef = isDef;
282 return getReg() == Other.getReg() && isDef() == Other.isDef() &&
348 return hash_combine(MO.getType(), (unsigned)MO.getReg(), MO.getSubReg(), MO.isDef());
733 OS << (isDef()
[all...]
H A DLivePhysRegs.cpp52 if (MOP.isDef())
88 if (O->isDef()) {
288 if (!MO->isReg() || !MO->isDef() || MO->isDebug())
H A DCriticalAntiDepBreaker.cpp287 if (!MO.isDef()) continue;
366 if (RefOper->isDef() && RefOper->isEarlyClobber())
377 if (!CheckOper.isReg() || !CheckOper.isDef() ||
383 if (RefOper->isDef())
632 if (MO.isDef() && Reg != AntiDepReg)
H A DVirtRegMap.cpp530 if ((MO.readsReg() && (MO.isDef() || MO.isKill())) ||
531 (MO.isDef() && subRegLiveThrough(*MI, PhysReg)))
534 if (MO.isDef()) {
549 assert(MO.isDef());
557 if (MO.isDef()) {
H A DMachineLICM.cpp468 if (!MO.isDef()) {
590 if (!MO.isReg() || MO.isDef() || !MO.getReg())
615 if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
805 if (!MO.isDef() || !MO.isReg() || !MO.getReg())
900 if (MO.isDef())
1097 if (!MO.isReg() || !MO.isDef())
1167 if (!DefMO.isReg() || !DefMO.isDef())
1266 if (MO.isDef() && HasHighOperandLatency(MI, i, Reg)) {
1420 if (MO.isReg() && MO.isDef() &&
1531 if (MO.isReg() && MO.isDef()
[all...]
H A DRegisterScavenging.cpp148 assert(MO.isDef());
244 assert(MO.isDef());
334 if (MO.isDef())
637 if (MO.isDef()) {
729 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses");
733 if (MO.isDef()) {
744 assert((!MO.isUndef() || MO.isDef()) && "Cannot handle undef uses");
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyUtilities.cpp33 if (!MO.isReg() || MO.isImplicit() || !MO.isDef())
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOperand.h286 /// isDef. Sometimes, if the operand is printed before '=', we don't print
373 bool isDef() const { function
753 void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,
779 static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp = false,
786 assert(!(isDead && !isDef) && "Dead flag on non-def");
787 assert(!(isKill && isDef) && "Kill flag on def");
789 Op.IsDef = isDef;
H A DLiveRegUnits.h59 if (O->isDef()) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FixupBWInsts.cpp264 assert((MO.isDef() || MO.isUse()) && "Expected Def or Use only!");
266 if (MO.isDef() && TRI->isSuperRegisterEq(OrigDestReg, MO.getReg()))
340 if (Op.getReg() != (Op.isDef() ? NewDestReg : NewSrcReg))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiDelaySlotFiller.cpp210 if (MO.isDef()) {
239 if (MO.isDef())
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DRegBankSelect.cpp154 if (MO.isDef())
175 if (MO.isDef()) {
247 assert(CurRegBank || MO.isDef());
266 if (MO.isDef())
339 assert((!MI.isPHI() || !MO.isDef()) && "Need split for phi def?");
342 if (!MO.isDef()) {
366 assert(MI.isTerminator() && MO.isDef() &&
736 bool Before = !MO.isDef();
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp374 if (!Op.isReg() || !Op.isDef())
501 if (Op.isDef()) {
674 assert(MD.isDef());
730 if (!Op.isReg() || !Op.isDef())
766 if (!Op.isReg() || !Op.isDef())
812 if (Op.isDef() && isRefInMap(RR, Uses, Exec_Then))
879 if (!MO.isReg() || !MO.isDef())
927 assert(!Op.isDef() && "Not expecting a def");
1006 ReferenceMap &Map = Op.isDef() ? Defs : Uses;
1007 if (Op.isDef()
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