Searched refs:aintc_write_4 (Results 1 - 2 of 2) sorted by relevance
/freebsd-11-stable/sys/arm/ti/ |
H A D | aintc.c | 98 #define aintc_write_4(_sc, reg, val) \ macro 113 aintc_write_4(sc, INTC_CONTROL, 1); 120 aintc_write_4(sc, INTC_MIR_SET(irq >> 5), (1UL << (irq & 0x1F))); 127 aintc_write_4(sc, INTC_MIR_CLEAR(irq >> 5), (1UL << (irq & 0x1F))); 253 aintc_write_4(ti_aintc_sc, INTC_CONTROL, 1); /* EOI */ 295 aintc_write_4(sc, INTC_SYSCONFIG, 2); 301 aintc_write_4(sc, INTC_THRESHOLD, 0xFF); 356 aintc_write_4(sc, INTC_SIR_IRQ, 0); 371 aintc_write_4(sc, INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F))); 372 aintc_write_4(s [all...] |
/freebsd-11-stable/sys/arm/allwinner/a10/ |
H A D | a10_intc.c | 120 #define aintc_write_4(sc, reg, val) \ macro 130 aintc_write_4(sc, SW_INT_IRQ_PENDING_REG(0), 146 aintc_write_4(sc, SW_INT_ENABLE_REG(block), value); 150 aintc_write_4(sc, SW_INT_MASK_REG(block), value); 165 aintc_write_4(sc, SW_INT_ENABLE_REG(block), value); 169 aintc_write_4(sc, SW_INT_MASK_REG(block), value); 387 aintc_write_4(sc, SW_INT_ENABLE_REG(i), 0); 388 aintc_write_4(sc, SW_INT_MASK_REG(i), 0xffffffff); 391 aintc_write_4(sc, SW_INT_PROTECTION_REG, 0x01); 394 aintc_write_4(s [all...] |
Completed in 56 milliseconds