Searched refs:agp_base (Results 1 - 15 of 15) sorted by relevance

/freebsd-11-stable/sys/dev/drm/
H A Dvia_dma.c87 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; local
88 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
101 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; local
102 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
116 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; local
125 hw_addr = *hw_addr_ptr - agp_base;
508 uint32_t agp_base; local
519 agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
524 agp_base + dev_priv->dma_low - 8 + (qw_pad_count << 3);
540 uint32_t agp_base; local
613 uint32_t agp_base; local
[all...]
H A Dradeon_cp.c228 void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) argument
230 u32 agp_base_hi = upper_32_bits(agp_base);
231 u32 agp_base_lo = agp_base & 0xffffffff;
232 u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff;
H A Dradeon_drv.h452 extern void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base);
/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dr520.c160 WREG32_MC(R_000006_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
162 S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));
H A Dradeon_agp.c248 rdev->mc.agp_base = rdev->ddev->agp->agp_info.ai_aperture_base;
250 rdev->mc.gtt_start = rdev->mc.agp_base;
H A Dradeon_device.c1175 __func__, (uintmax_t)rdev->mc.agp_base,
1176 (uintmax_t)rdev->mc.agp_base + rdev->mc.gtt_size);
1178 rdev->mc.agp_base,
1179 rdev->mc.agp_base + rdev->mc.gtt_size,
1183 "0x%jx-0x%jx (%d).\n", (uintmax_t)rdev->mc.agp_base,
1184 (uintmax_t)rdev->mc.agp_base + rdev->mc.gtt_size, r);
1230 rdev->mc.agp_base,
1231 rdev->mc.agp_base + rdev->mc.gtt_size);
H A Dr300.c1321 WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
1323 upper_32_bits(rdev->mc.agp_base) & 0xff);
H A Drv515.c485 WREG32_MC(R_000003_MC_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
487 S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base)));
H A Dradeon_ttm.c431 mem->bus.base = rdev->mc.agp_base;
H A Drv770.c298 WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);
H A Dradeon.h510 resource_size_t agp_base; member in struct:radeon_mc
H A Dradeon_drv.h368 extern void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base);
H A Dr100.c3936 WREG32(R_000170_AGP_BASE, lower_32_bits(rdev->mc.agp_base));
3939 upper_32_bits(rdev->mc.agp_base) & 0xff);
H A Dr600.c1086 WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);
H A Devergreen.c1585 WREG32(MC_VM_AGP_BASE, rdev->mc.agp_base >> 22);

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