Searched refs:TmpR (Results 1 - 4 of 4) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp225 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local
227 BuildMI(MB, II, DL, HII.get(Hexagon::A2_addi), TmpR)
230 BP = TmpR;
H A DHexagonFrameLowering.cpp1613 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass);
1614 BuildMI(B, It, DL, HII.get(TargetOpcode::COPY), TmpR).add(MI->getOperand(1));
1616 .addReg(TmpR, RegState::Kill);
1618 NewRegs.push_back(TmpR);
1636 // TmpR = C2_tfrpr SrcR if SrcR is a predicate register
1637 // TmpR = A2_tfrcrr SrcR if SrcR is a modifier register
1638 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local
1641 BuildMI(B, It, DL, HII.get(TfrOpc), TmpR)
1644 // S2_storeri_io FI, 0, TmpR
1648 .addReg(TmpR, RegStat
1669 Register TmpR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); local
[all...]
H A DHexagonSplitDouble.cpp816 Register TmpR = MRI->createVirtualRegister(IntRC); local
820 // TmpR = extractu R.lo, #s, #32-s
821 // HiR = or (TmpR, asl(R.hi, #s))
824 // TmpR = shr R.lo, #s
825 // LoR = insert TmpR, R.hi, #s, #32-s
830 // TmpR = shr R.lo, #s
838 BuildMI(B, MI, DL, TII->get(A2_asrh), TmpR)
841 BuildMI(B, MI, DL, TII->get(ShiftOpc), (Left ? LoR : TmpR))
846 // TmpR = extractu R.lo, #s, #32-s
847 BuildMI(B, MI, DL, TII->get(S2_extractu), TmpR)
[all...]
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DBugReporterVisitors.cpp1440 if (const auto *TmpR = dyn_cast<CXXTempObjectRegion>(R))
1441 InitE = TmpR->getExpr();

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