Searched refs:ShiftValue (Results 1 - 5 of 5) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | Alignment.h | 42 uint8_t ShiftValue = 0; /// The log2 of the required alignment. member in struct:llvm::Align
43 /// ShiftValue is less than 64 by construction.
80 ShiftValue = Log2_64(Value);
81 assert(ShiftValue < 64 && "Broken invariant");
86 uint64_t value() const { return uint64_t(1) << ShiftValue; }
107 constexpr Align(LogValue CA) : ShiftValue(CA.Log) {}
204 inline unsigned Log2(Align A) { return A.ShiftValue; }
236 inline unsigned encode(MaybeAlign A) { return A ? A->ShiftValue + 1 : 0; }
243 Out.ShiftValue = Value - 1;
307 return Lhs.ShiftValue
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCAsmBackend.cpp | 113 unsigned ShiftValue = (Size * 8) - 8; local
115 Data[Offset + I] |= uint8_t(Value >> ShiftValue);
116 ShiftValue -= 8;
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| H A D | SystemZMCCodeEmitter.cpp | 164 unsigned ShiftValue = (Size * 8) - 8; local
166 OS << uint8_t(Bits >> ShiftValue);
167 ShiftValue -= 8;
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 4823 uint64_t ShiftValue = ImmValue; local
4825 ShiftValue = MaxShift - ImmValue;
4826 TOut.emitRRI(Mips::ROTR, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
4965 uint64_t ShiftValue = ImmValue % 32; local
4967 ShiftValue = (32 - ImmValue % 32) % 32;
4969 TOut.emitRRI(FinalOpcode, DReg, SReg, ShiftValue, Inst.getLoc(), STI);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 7769 SDValue ShiftValue; local
7771 ShiftValue = DAG.getBuildVector(ShiftVT, DL, ShiftValues);
7773 ShiftValue = ShiftValues[0];
7774 return DAG.getNode(ISD::SRA, DL, VT, N0.getOperand(0), ShiftValue);
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