/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetSchedule.h | 34 MCSchedModel SchedModel; member in class:llvm::TargetSchedModel 50 TargetSchedModel() : SchedModel(MCSchedModel::GetDefaultSchedModel()) {} 75 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } 96 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } 99 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } 114 return SchedModel.getNumProcResourceKinds(); 119 return SchedModel.getProcResource(PIdx); 126 return SchedModel.getProcResource(PIdx)->Name; 161 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } 166 return SchedModel [all...] |
H A D | ScheduleDAGInstrs.h | 125 TargetSchedModel SchedModel; member in class:llvm::ScheduleDAGInstrs 262 const TargetSchedModel *getSchedModel() const { return &SchedModel; } 266 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) 267 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr());
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H A D | MachineScheduler.h | 598 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel); 614 const TargetSchedModel *SchedModel = nullptr; member in class:llvm::SchedBoundary 727 return RetiredMOps * SchedModel->getMicroOpFactor(); 735 return std::max(CurrCycle * SchedModel->getLatencyFactor(), 889 const TargetSchedModel *SchedModel); 894 const TargetSchedModel *SchedModel = nullptr; member in class:llvm::GenericSchedulerBase
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H A D | MachineTraceMetrics.h | 93 TargetSchedModel SchedModel; member in class:llvm::MachineTraceMetrics 133 /// This is an array with SchedModel.getNumProcResourceKinds() entries. 136 /// These numbers have already been scaled by SchedModel.getResourceFactor(). 407 // where Kinds = SchedModel.getNumProcResourceKinds(). 416 unsigned Factor = SchedModel.getLatencyFactor();
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H A D | TargetSubtargetInfo.h | 141 const TargetSchedModel *SchedModel) const {
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZHazardRecognizer.h | 48 const TargetSchedModel *SchedModel; member in class:llvm::SystemZHazardRecognizer 112 : TII(tii), SchedModel(SM) { 122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel()) 123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr());
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H A D | SystemZHazardRecognizer.cpp | 152 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) 176 PI = SchedModel->getWriteProcResBegin(SC), 177 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { 179 *SchedModel->getProcResource(PI->ProcResourceIdx); 226 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) 236 for (unsigned i = 0; i < SchedModel->getNumProcResourceKinds(); ++i) 238 dbgs() << SchedModel->getProcResource(i)->Name 244 << SchedModel->getProcResource(CriticalResourceIdx)->Name 260 ProcResourceCounters.assign(SchedModel->getNumProcResourceKinds(), 0); 297 PI = SchedModel [all...] |
H A D | SystemZMachineScheduler.h | 35 // A SchedModel is needed before any DAG is built while advancing past 38 TargetSchedModel SchedModel; member in class:llvm::SystemZPostRASchedStrategy
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H A D | SystemZMachineScheduler.cpp | 87 HazardRec = SchedStates[MBB] = new SystemZHazardRecognizer(TII, &SchedModel); 135 SchedModel.init(ST);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetSchedule.cpp | 40 return EnableSchedModel && SchedModel.hasInstrSchedModel(); 65 SchedModel = TSInfo->getSchedModel(); 69 unsigned NumRes = SchedModel.getNumProcResourceKinds(); 71 ResourceLCM = SchedModel.IssueWidth; 73 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; 77 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; 79 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits; 136 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); 147 SCDesc = SchedModel.getSchedClassDesc(SchedClass); 189 return TII->defaultDefLatency(SchedModel, *DefM [all...] |
H A D | MachineTraceMetrics.cpp | 73 SchedModel.init(&ST); 76 SchedModel.getNumProcResourceKinds()); 109 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); 120 if (!SchedModel.hasInstrSchedModel()) 122 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); 127 PI = SchedModel.getWriteProcResBegin(SC), 128 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { 139 PRCycles[K] * SchedModel.getResourceFactor(K); 148 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); 160 unsigned PRKinds = MTM.SchedModel [all...] |
H A D | MachineScheduler.cpp | 1177 if (SchedModel.mustBeginGroup(SU.getInstr()) && 1178 SchedModel.mustEndGroup(SU.getInstr())) 1885 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { argument 1887 if (!SchedModel->hasInstrSchedModel()) 1889 RemainingCounts.resize(SchedModel->getNumProcResourceKinds()); 1892 RemIssueCount += SchedModel->getNumMicroOps(SU.getInstr(), SC) 1893 * SchedModel->getMicroOpFactor(); 1895 PI = SchedModel->getWriteProcResBegin(SC), 1896 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { 1898 unsigned Factor = SchedModel 2451 initResourceDelta(const ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) argument [all...] |
H A D | EarlyIfConversion.cpp | 704 MCSchedModel SchedModel; member in class:__anon1708::EarlyIfConverter 814 unsigned CritLimit = SchedModel.MispredictPenalty/2; 912 SchedModel = STI.getSchedModel(); 941 TargetSchedModel SchedModel; member in class:__anon1710::EarlyIfPredicator 993 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); 1007 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); 1013 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); 1047 SchedModel.init(&STI);
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H A D | ScheduleDAGInstrs.cpp | 120 SchedModel.init(&ST); 270 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, 319 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); 445 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, 489 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); 581 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); 591 if (SchedModel.hasInstrSchedModel()) { 594 make_range(SchedModel.getWriteProcResBegin(SC), 595 SchedModel.getWriteProcResEnd(SC))) { 596 switch (SchedModel [all...] |
H A D | ScoreboardHazardRecognizer.cpp | 73 // A nonempty itinerary must have a SchedModel. 74 IssueWidth = ItinData->SchedModel.IssueWidth;
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H A D | MachineCombiner.cpp | 68 MCSchedModel SchedModel; member in class:__anon1750::MachineCombiner 371 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx); 648 SchedModel = STI->getSchedModel();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64StorePairSuppress.cpp | 34 TargetSchedModel SchedModel; member in class:__anon2050::AArch64StorePairSuppress 87 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); 129 SchedModel.init(&ST); 135 if (!SchedModel.hasInstrSchedModel()) {
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H A D | AArch64SIMDInstrOpt.cpp | 71 TargetSchedModel SchedModel; member in struct:__anon2045::AArch64SIMDInstrOpt 222 std::string Subtarget = SchedModel.getSubtargetInfo()->getCPU(); 229 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); 241 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc( 253 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); 255 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) 291 std::string Subtarget = SchedModel.getSubtargetInfo()->getCPU(); 702 SchedModel.init(&ST); 703 if (!SchedModel.hasInstrSchedModel())
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H A D | AArch64ConditionalCompares.cpp | 765 MCSchedModel SchedModel; member in class:__anon2025::AArch64ConditionalCompares 885 unsigned DelayLimit = SchedModel.MispredictPenalty * 3 / 4; 936 SchedModel = MF.getSubtarget().getSchedModel();
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonMachineScheduler.h | 41 const TargetSchedModel *SchedModel; member in class:llvm::VLIWResourceModel 52 : SchedModel(SM) { 59 Packet.resize(SchedModel->getIssueWidth()); 135 const TargetSchedModel *SchedModel = nullptr; member in struct:llvm::ConvergingVLIWScheduler::VLIWSchedBoundary 167 SchedModel = smodel; 175 CriticalPathLength = DAG->getBBSize() / SchedModel->getIssueWidth(); 218 const TargetSchedModel *SchedModel = nullptr; member in class:llvm::ConvergingVLIWScheduler
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H A D | HexagonMachineScheduler.cpp | 150 Packet.size() >= SchedModel->getIssueWidth()) { 255 SchedModel = DAG->getSchedModel(); 257 Top.init(DAG, SchedModel); 258 Bot.init(DAG, SchedModel); 340 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); 341 if (IssueCount + uops > SchedModel->getIssueWidth()) 363 unsigned Width = SchedModel->getIssueWidth(); 407 IssueCount += SchedModel->getNumMicroOps(SU->getInstr());
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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstrItineraries.h | 108 MCSchedModel SchedModel = member in class:llvm::InstrItineraryData 119 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), 120 Itineraries(SchedModel.InstrItineraries) {}
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H A D | MCSubtargetInfo.h | 57 const MCSchedModel *SchedModel; member in struct:llvm::SubtargetSubTypeKV
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCSubtargetInfo.cpp | 304 assert(CPUEntry->SchedModel && "Missing processor SchedModel value"); 305 return *CPUEntry->SchedModel; 310 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); local 311 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSubtarget.cpp | 201 SchedModel = getSchedModelForCPU(CPUString); 369 return SchedModel.MispredictPenalty; 387 // This overrides the PostRAScheduler bit in the SchedModel for any CPU.
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