Searched refs:SYSCTL_CLKCFG1 (Results 1 - 9 of 9) sorted by relevance
| /freebsd-11-stable/sys/mips/mediatek/ |
| H A D | mtk_clock.c | 97 mtk_sysctl_clr_set(SYSCTL_CLKCFG1, 0, mask);
99 mtk_sysctl_clr_set(SYSCTL_CLKCFG1, mask, 0);
126 if (mtk_sysctl_get(SYSCTL_CLKCFG1) & mask)
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| H A D | mtk_sysctl.h | 44 #define SYSCTL_CLKCFG1 0x30 macro
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| H A D | mtk_pcie.c | 1185 mtk_sysctl_clr_set(SYSCTL_CLKCFG1, RT3883_PCI_CLK, 0);
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| /freebsd-11-stable/sys/mips/rt305x/ |
| H A D | rt305x_dotg.c | 144 rt305x_sysctl_set(SYSCTL_CLKCFG1, rt305x_sysctl_get(SYSCTL_CLKCFG1) |
188 rt305x_sysctl_set(SYSCTL_CLKCFG1,
189 rt305x_sysctl_get(SYSCTL_CLKCFG1) &
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| H A D | rt305x_ehci.c | 94 reg = rt305x_sysctl_get(SYSCTL_CLKCFG1);
99 rt305x_sysctl_set(SYSCTL_CLKCFG1, reg);
190 rt305x_sysctl_set(SYSCTL_CLKCFG1,
191 rt305x_sysctl_get(SYSCTL_CLKCFG1) &
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| H A D | rt305x_ohci.c | 94 reg = rt305x_sysctl_get(SYSCTL_CLKCFG1);
99 rt305x_sysctl_set(SYSCTL_CLKCFG1, reg);
190 rt305x_sysctl_set(SYSCTL_CLKCFG1,
191 rt305x_sysctl_get(SYSCTL_CLKCFG1) &
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| H A D | rt305x_sysctl.c | 104 DUMPREG(SYSCTL_CLKCFG1);
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| H A D | rt305x_pci.c | 568 rt305x_sysctl_set(SYSCTL_CLKCFG1,
569 rt305x_sysctl_get(SYSCTL_CLKCFG1) | (1<<26));
919 rt305x_sysctl_set(SYSCTL_CLKCFG1,
920 rt305x_sysctl_get(SYSCTL_CLKCFG1) & ~(1<<26));
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| H A D | rt305xreg.h | 256 #define SYSCTL_CLKCFG1 0x30 macro
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