Searched refs:SUa (Results 1 - 5 of 5) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUSubtarget.cpp763 SUnit *SUa = nullptr; variable
771 SUa = nullptr;
774 if (!SUa) {
775 SUa = &SU;
779 MachineInstr &MI1 = *SUa->getInstr();
784 SU.addPredBarrier(SUa);
787 if (SI.getSUnit() != SUa)
788 SUa->addPred(SDep(SI.getSUnit(), SDep::Artificial));
792 for (const SDep &SI : SUa->Succs) {
799 SUa
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAGInstrs.h204 /// Adds a chain edge between SUa and SUb, but only if both
206 void addChainDependency(SUnit *SUa, SUnit *SUb,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp544 void ScheduleDAGInstrs::addChainDependency (SUnit *SUa, SUnit *SUb, argument
546 if (SUa->getInstr()->mayAlias(AAForDep, *SUb->getInstr(), UseTBAA)) {
547 SDep Dep(SUa, SDep::MayAliasMem);
H A DMachineScheduler.cpp1574 SUnit *SUa = MemOpRecords[Idx].SU; local
1576 if (SUa->NodeNum > SUb->NodeNum)
1577 std::swap(SUa, SUb);
1581 DAG->addEdge(SUb, SDep(SUa, SDep::Cluster))) {
1582 LLVM_DEBUG(dbgs() << "Cluster ld/st SU(" << SUa->NodeNum << ") - SU("
1584 // Copy successor edges from SUa to SUb. Interleaving computation
1585 // dependent on SUa can prevent load combining due to register reuse.
1586 // Predecessor edges do not need to be copied from SUb to SUa since nearby
1588 for (const SDep &Succ : SUa->Succs) {
H A DMachinePipeliner.cpp604 /// Return true if SUb can be reached from SUa following the chain edges.
605 static bool isSuccOrder(SUnit *SUa, SUnit *SUb) { argument
608 Worklist.push_back(SUa);

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