Searched refs:SDWA (Results 1 - 8 of 8) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPeepholeSDWA.cpp1 //===- SIPeepholeSDWA.cpp - Peephole optimization for SDWA instructions ---===//
9 /// \file This pass tries to apply several peephole SDWA patterns.
59 STATISTIC(NumSDWAPatternsFound, "Number of SDWA patterns found.");
61 "Number of instruction converted to SDWA.");
99 StringRef getPassName() const override { return "SI Peephole SDWA"; }
138 using namespace AMDGPU::SDWA;
213 INITIALIZE_PASS(SIPeepholeSDWA, DEBUG_TYPE, "SI Peephole SDWA", false, false)
249 OS << "SDWA src: " << *getTargetOperand()
257 OS << "SDWA dst: " << *getTargetOperand()
264 OS << "SDWA preserv
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H A DSIDefines.h41 SDWA = 1 << 14,
169 // Operand for SDWA instructions
230 SDWA = 2,
411 namespace SDWA { namespace in namespace:llvm::SIInstrFlags::SISrcMods::SIOutMods::AMDGPU::VGPRIndexMode::AMDGPUAsmVariants::AMDGPU::AMDGPU::SendMsg::Hwreg::Swizzle
444 } // namespace SDWA
H A DSIInstrInfo.h430 return MI.getDesc().TSFlags & SIInstrFlags::SDWA;
434 return get(Opcode).TSFlags & SIInstrFlags::SDWA;
H A DSIInstrInfo.cpp3309 // Verify SDWA
3312 ErrInfo = "SDWA is not supported on this target";
3328 ErrInfo = "Only VGPRs allowed as operands in SDWA instructions on VI";
3334 ErrInfo = "Only reg allowed as operands in SDWA instructions on GFX9";
3345 ErrInfo = "OMod not allowed in SDWA instructions on VI";
3356 ErrInfo = "Only VCC allowed as dst in SDWA instructions on VI";
3363 ErrInfo = "Clamp not allowed in VOPC SDWA instructions on VI";
3370 ErrInfo = "OMod not allowed in VOPC SDWA instructions on VI";
3378 DstUnused->getImm() == AMDGPU::SDWA::UNUSED_PRESERVE) {
6319 SDWA
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DSIMCCodeEmitter.cpp366 using namespace AMDGPU::SDWA;
396 using namespace AMDGPU::SDWA;
H A DAMDGPUInstPrinter.cpp310 else if (MII.get(MI->getOpcode()).TSFlags & SIInstrFlags::SDWA)
816 using namespace llvm::AMDGPU::SDWA;
827 default: llvm_unreachable("Invalid SDWA data select operand");
855 using namespace llvm::AMDGPU::SDWA;
863 default: llvm_unreachable("Invalid SDWA dest_unused operand");
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2665 (isForcedSDWA() && !(TSFlags & SIInstrFlags::SDWA)) )
2679 if (!Op.isImm() || Op.getImm() != AMDGPU::SDWA::SdwaSel::DWORD) {
2700 static const unsigned Variants[] = {AMDGPUAsmVariants::SDWA,
2712 AMDGPUAsmVariants::SDWA, AMDGPUAsmVariants::SDWA9, AMDGPUAsmVariants::DPP
2822 SIInstrFlags::SDWA)) {
3073 if ((Desc.TSFlags & SIInstrFlags::SDWA) == 0 || !IsMovrelsSDWAOpcode(Opc))
3260 if ((Desc.TSFlags & (VOP1 | VOP2 | VOP3 | VOPC | VOP3P | SIInstrFlags::SDWA)) == 0)
3286 return (Desc.TSFlags & SIInstrFlags::SDWA) == 0 && !IsRevOpcode(Opcode);
6790 using namespace llvm::AMDGPU::SDWA;
6823 using namespace llvm::AMDGPU::SDWA;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp283 // Try to decode DPP and SDWA first to solve conflict with VOP1 and VOP2
1105 using namespace AMDGPU::SDWA;
1153 using namespace AMDGPU::SDWA;

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