Searched refs:RADEON_AIC_CNTL (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/sys/dev/drm/
H A Dradeon_irq.c229 tmp = RADEON_READ(RADEON_AIC_CNTL) &
231 RADEON_WRITE(RADEON_AIC_CNTL, tmp);
232 RADEON_WRITE(RADEON_AIC_CNTL,
H A Dradeon_cp.c307 (unsigned int)RADEON_READ(RADEON_AIC_CNTL));
1047 tmp = RADEON_READ(RADEON_AIC_CNTL);
1050 RADEON_WRITE(RADEON_AIC_CNTL,
1068 RADEON_WRITE(RADEON_AIC_CNTL,
H A Dradeon_drv.h1140 #define RADEON_AIC_CNTL 0x01d0 macro
/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dr100.c673 tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
674 WREG32(RADEON_AIC_CNTL, tmp);
680 tmp = RREG32(RADEON_AIC_CNTL) | RADEON_PCIGART_TRANSLATE_EN;
681 WREG32(RADEON_AIC_CNTL, tmp);
695 tmp = RREG32(RADEON_AIC_CNTL) | RADEON_DIS_OUT_OF_PCI_GART_ACCESS;
696 WREG32(RADEON_AIC_CNTL, tmp & ~RADEON_PCIGART_TRANSLATE_EN);
825 msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM;
826 WREG32(RADEON_AIC_CNTL, msi_rearm);
827 WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
H A Dradeon_drv.h1061 #define RADEON_AIC_CNTL 0x01d0 macro
H A Dradeon_reg.h3368 #define RADEON_AIC_CNTL 0x01d0 macro

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