Searched refs:R300_SCLK_CNTL2 (Results 1 - 2 of 2) sorted by relevance

/freebsd-11-stable/sys/dev/drm2/radeon/
H A Dradeon_clocks.c547 tmp = RREG32_PLL(R300_SCLK_CNTL2);
554 WREG32_PLL(R300_SCLK_CNTL2, tmp);
643 tmp = RREG32_PLL(R300_SCLK_CNTL2);
647 WREG32_PLL(R300_SCLK_CNTL2, tmp);
792 tmp = RREG32_PLL(R300_SCLK_CNTL2);
795 WREG32_PLL(R300_SCLK_CNTL2, tmp);
873 tmp = RREG32_PLL(R300_SCLK_CNTL2);
877 WREG32_PLL(R300_SCLK_CNTL2, tmp);
H A Dradeon_reg.h1694 #define R300_SCLK_CNTL2 0x1e /* PLL */ macro

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