Searched refs:PRE_INC (Results 1 - 25 of 39) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h967 /// PRE_INC Similar to the unindexed mode where the effective address is
987 PRE_INC, enumerator in enum:llvm::ISD::MemIndexedMode
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGAddressAnalysis.cpp178 if (N->getAddressingMode() == ISD::PRE_INC) {
H A DSelectionDAGDumper.cpp457 case ISD::PRE_INC: return "<pre-inc>";
/freebsd-11-stable/contrib/gcc/config/arm/
H A Darm.h2030 || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC) \
2348 else if (GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC \
2355 if (GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
/freebsd-11-stable/contrib/gcc/
H A Dcselib.c658 case PRE_INC:
871 case PRE_INC:
H A Dregrename.c621 case PRE_INC:
707 case PRE_INC:
1548 case PRE_INC:
H A Dalias.c926 case PRE_INC:
1385 case PRE_INC:
1607 case PRE_INC:
H A Dsched-vis.c323 case PRE_INC:
H A Drecog.c50 #define STACK_PUSH_CODE PRE_INC
1686 || GET_CODE (XEXP (op, 0)) == PRE_INC
2496 && (GET_CODE (XEXP (op, 0)) == PRE_INC
H A Dregclass.c1184 depend on the exact outer code (POST_INC vs. PRE_INC etc.), and
1609 && (GET_CODE (XEXP (op, 0)) == PRE_INC
2090 case PRE_INC:
H A Dpostreload-gcse.c541 case PRE_INC:
H A Dresource.c733 case PRE_INC:
H A Drtlanal.c318 case PRE_INC:
388 case PRE_INC:
2014 case PRE_INC:
2843 case PRE_INC:
H A Dreload.c961 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
2215 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2325 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
3218 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
5649 case PRE_INC:
6667 case PRE_INC:
7097 || GET_CODE (addr) == PRE_INC
H A Dexpr.c77 #define STACK_PUSH_CODE PRE_INC
892 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
911 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
2384 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2958 case PRE_INC:
3005 case PRE_INC:
H A Dpostreload.c1451 if (GET_CODE (dst) == PRE_INC || GET_CODE (dst) == POST_INC
H A Dstruct-equiv.c641 case POST_INC: case POST_DEC: case PRE_INC: case PRE_DEC:
H A Dgcse.c1280 case PRE_INC:
3034 case PRE_INC:
5572 case PRE_INC:
H A Ddf-scan.c1448 case PRE_INC:
H A Dlocal-alloc.c600 case PRE_INC:
H A Dregmove.c120 && pre == 1 && (inc_code = PRE_INC, increment == size))
H A Dreload1.c2555 case PRE_INC:
2748 case PRE_INC:
2766 else if (code == PRE_INC || code == POST_INC)
4076 /* PRE_INC / PRE_DEC will have the reload register ending up
4151 else if ((code == PRE_INC || code == PRE_DEC)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp793 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
829 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
849 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
928 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC)
1332 OffImm = ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
1401 ((AM == ISD::PRE_INC) || (AM == ISD::POST_INC))
1529 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC);
1636 bool isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC);
1700 isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC);
1716 isPre = (AM == ISD::PRE_INC) || (A
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp190 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal);
191 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal);
192 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal);
193 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal);
194 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal);
195 setIndexedStoreAction(ISD::PRE_INC, MVT::i1, Legal);
196 setIndexedStoreAction(ISD::PRE_INC, MVT::i8, Legal);
197 setIndexedStoreAction(ISD::PRE_INC, MVT::i16, Legal);
198 setIndexedStoreAction(ISD::PRE_INC, MVT::i32, Legal);
199 setIndexedStoreAction(ISD::PRE_INC, MV
[all...]
/freebsd-11-stable/contrib/gcc/config/rs6000/
H A Drs6000.c3575 if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC)
3638 case PRE_INC:
10542 if (GET_CODE (XEXP (x, 0)) == PRE_INC
10745 && (GET_CODE (XEXP (x, 0)) == PRE_INC
10843 if (GET_CODE (XEXP (x, 0)) == PRE_INC
10890 if (GET_CODE (XEXP (x, 0)) == PRE_INC
10962 /* We need to handle PRE_INC and PRE_DEC here, since we need to
10964 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
12697 if (GET_CODE (XEXP (src, 0)) == PRE_INC
12702 delta_rtx = (GET_CODE (XEXP (src, 0)) == PRE_INC
[all...]

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