Searched refs:Opc0 (Results 1 - 5 of 5) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineVectorOps.cpp | 1581 BinaryOperator::BinaryOps Opc0 = B0->getOpcode(); 1584 if (ConstantsAreOp1 && Opc0 != Opc1) { 1588 if (Opc0 == Instruction::Shl || Opc1 == Instruction::Shl) 1592 Opc0 = AltB0.Opcode; 1601 if (Opc0 != Opc1) 1605 BinaryOperator::BinaryOps BOpc = Opc0;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIInstrInfo.cpp | 106 unsigned Opc0 = N0->getMachineOpcode(); local 109 int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName); 152 unsigned Opc0 = Load0->getMachineOpcode(); local 156 if (!get(Opc0).mayLoad() || !get(Opc1).mayLoad()) 159 if (isDS(Opc0) && isDS(Opc1)) { 172 int Offset0Idx = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset); 181 Offset0Idx -= get(Opc0).NumDefs; 188 if (isSMRD(Opc0) && isSMRD(Opc1)) { 190 if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::sbase) == -1 || 214 if ((isMUBUF(Opc0) || isMTBU [all...] |
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 23651 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), 23659 Opc = IntrData->Opc0; 23685 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), 23693 Opc = IntrData->Opc0; 23723 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), 23727 return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1), 23749 DAG.getNode(IntrData->Opc0, dl, VT, Src), Mask, PassThru, 23760 Opc = IntrData->Opc0; 23791 return getScalarMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src1, 23799 unsigned Opc = IntrData->Opc0; [all...] |
H A D | X86IntrinsicsInfo.h | 46 uint16_t Opc0; member in struct:llvm::IntrinsicData
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 5572 unsigned Opc0 = N0.getOpcode(); local 5573 if (Opc0 != ISD::AND && Opc0 != ISD::SHL && Opc0 != ISD::SRL) 5580 else if (Opc0 == ISD::AND) 5594 if (Opc == ISD::SRL || (Opc == ISD::AND && Opc0 == ISD::SHL)) { 5608 if (Opc0 != ISD::SRL) 5616 if (Opc0 != ISD::SHL)
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