Searched refs:OpSize (Results 1 - 18 of 18) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h170 /// The OpSize field from the record
171 uint8_t OpSize; member in class:llvm::X86Disassembler::RecognizableInstr
237 /// @param OpSize Indicates the operand size of the instruction.
238 /// If register size does not match OpSize, then
242 bool hasREX_WPrefix, uint8_t OpSize);
249 /// @param OpSize - Indicates whether this is an OpSize16 instruction.
253 uint8_t OpSize);
258 uint8_t OpSize);
263 uint8_t OpSize);
265 uint8_t OpSize);
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H A DX86RecognizableInstr.cpp82 OpSize = byteFromRec(Rec, "OpSizeBits");
295 if (HasREX_WPrefix && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD))
299 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD)
301 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS)
305 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32)
307 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)
324 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD)
326 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS)
334 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16)
336 else if (OpSize
363 handleOperand(bool optional, unsigned &operandIndex, unsigned &physicalOperandIndex, unsigned numPhysicalOperands, const unsigned *operandMapping, OperandEncoding (*encodingFromString) (const std::string&, uint8_t OpSize)) argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp400 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); local
405 auto Libcalls = getFCmpLibcalls(Predicate, OpSize);
417 assert((OpSize == 32 || OpSize == 64) && "Unsupported operand size");
418 auto *ArgTy = OpSize == 32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx);
H A DARMInstructionSelector.cpp462 unsigned OpRegBank, unsigned OpSize)
465 OperandSize(OpSize) {}
461 CmpConstants(unsigned CmpOpcode, unsigned FlagsOpcode, unsigned SelectOpcode, unsigned OpRegBank, unsigned OpSize) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/
H A DMetadata.cpp481 size_t OpSize = NumOps * sizeof(MDOperand); local
484 OpSize = alignTo(OpSize, alignof(uint64_t));
485 void *Ptr = reinterpret_cast<char *>(::operator new(OpSize + Size)) + OpSize;
496 size_t OpSize = N->NumOperands * sizeof(MDOperand); local
497 OpSize = alignTo(OpSize, alignof(uint64_t));
502 ::operator delete(reinterpret_cast<char *>(Mem) - OpSize);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterBankInfo.cpp616 SmallVector<unsigned, 4> OpSize(NumOperands);
624 OpSize[Idx] = Ty.getSizeInBits();
667 OpSize[0]);
842 auto Mapping = getValueMapping(OpRegBankIdx[Idx], OpSize[Idx]);
H A DAArch64InstructionSelector.cpp474 /// and of size \p OpSize.
477 unsigned OpSize) {
480 if (OpSize == 32) {
491 } else if (OpSize == 64) {
507 switch (OpSize) {
544 /// size \p OpSize. This returns the variant with the base+unsigned-immediate
548 unsigned OpSize) {
552 switch (OpSize) {
564 switch (OpSize) {
878 unsigned OpSize local
476 selectBinaryOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument
547 selectLoadStoreUIOp(unsigned GenericOpc, unsigned RegBankID, unsigned OpSize) argument
1965 const unsigned OpSize = Ty.getSizeInBits(); local
1991 unsigned OpSize = Ty.getSizeInBits(); local
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H A DAArch64ISelLowering.cpp4147 unsigned OpSize = Flags.isByVal() ? Flags.getByValSize() * 8 local
4149 OpSize = (OpSize + 7) / 8;
4152 if (OpSize < 8)
4153 BEAlign = 8 - OpSize;
4162 int FI = MF.getFrameInfo().CreateFixedObject(OpSize, Offset, true);
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h76 unsigned OpSize = OpTy->getScalarSizeInBits(); local
77 if (DL.isLegalInteger(OpSize) &&
78 OpSize <= DL.getPointerTypeSizeInBits(Ty))
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp556 int64_t OpSize = MFI.getObjectSize(FI); local
561 OpSize = SubRegSize / 8;
564 MemSize = std::max(MemSize, OpSize);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp844 unsigned OpSize = OpTy.getSizeInBits(); local
847 if (OpSize == 32) {
888 bool Is64 = OpSize % 64 == 0;
890 LLT UnmergeTy = OpSize % 64 == 0 ? LLT::scalar(64) : LLT::scalar(32);
891 unsigned CmpOp = OpSize % 64 == 0 ? AMDGPU::V_CMP_EQ_U64_e64
3011 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); local
3014 OpdsMapping[2] = AMDGPU::getValueMapping(Op1Bank, OpSize);
3015 OpdsMapping[3] = AMDGPU::getValueMapping(Op2Bank, OpSize);
H A DSIISelLowering.cpp2834 unsigned OpSize = Flags.isByVal() ? local
2844 int FI = MFI.CreateFixedObject(OpSize, Offset, true);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp542 unsigned OpSize = OpTy.getSizeInBits(); local
545 if (getMRI()->getType(Ops[i]) != OpTy || Indices[i] != i * OpSize) {
551 if (MaybeMerge && Ops.size() * OpSize == ResTy.getSizeInBits()) {
H A DLegalizerHelper.cpp3517 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local
3521 if (SrcStart + NarrowSize <= OpStart || SrcStart >= OpStart + OpSize) {
3536 SegSize = std::min(NarrowSize, OpStart + OpSize - SrcStart);
3539 SegSize = std::min(SrcStart + NarrowSize - OpStart, OpSize);
3584 uint64_t OpSize = MRI.getType(OpReg).getSizeInBits(); local
3588 if (DstStart + NarrowSize <= OpStart || DstStart >= OpStart + OpSize) {
3606 SegSize = std::min(NarrowSize, OpStart + OpSize - DstStart);
3611 std::min(NarrowSize - InsertOffset, OpStart + OpSize - DstStart);
3615 if (ExtractOffset != 0 || SegSize != OpSize) {
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp751 unsigned OpSize = DL.getTypeSizeInBits(Op0->getType()); local
756 return ConstantInt::get(Op0->getType(), Offs1.zextOrTrunc(OpSize) -
757 Offs2.zextOrTrunc(OpSize));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp2752 auto OpSize = AMDGPU::getOperandSize(Desc, OpIdx); local
2754 switch (OpSize) { // expected operand size
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4125 uint32_t OpSize = (VA.getLocVT().getSizeInBits()+7)/8;
4126 FI = MF.getFrameInfo().CreateFixedObject(OpSize, Offset, true);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4902 uint32_t OpSize = (Arg.getValueSizeInBits() + 7) / 8; local
4903 int FI = MF.getFrameInfo().CreateFixedObject(OpSize, Offset, true);
12338 auto OpSize = N->getOperand(0).getValueSizeInBits(); local
12342 if (OpSize < Size) {

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