Searched refs:OpR (Results 1 - 5 of 5) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
H A DInstrInfoEmitter.cpp131 auto *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); local
132 OperandList.back().Rec = OpR;
137 Record *OpR = OperandList[j].Rec; local
140 if (OpR->isSubClassOf("RegisterOperand"))
141 OpR = OpR->getValueAsDef("RegClass");
142 if (OpR->isSubClassOf("RegisterClass"))
143 Res += getQualifiedName(OpR) + "RegClassID, ";
144 else if (OpR->isSubClassOf("PointerLikeRegClass"))
145 Res += utostr(OpR
414 Record *OpR = OperandRecords[I]; local
[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DFunctionComparator.cpp776 Value *OpR = InstR->getOperand(i); local
777 if (int Res = cmpValues(OpL, OpR))
780 assert(cmpTypes(OpL->getType(), OpR->getType()) == 0);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp1380 const MachineOperand &OpR = secondRegMatch ? NOp0 : NOp1; local
1381 if (OpR.isReg() && PI->modifiesRegister(OpR.getReg(), HRI)) {
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/
H A DPatternMatch.h1956 Value *OpL = nullptr, *OpR = nullptr; local
1969 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));
1972 return Signum.match(V) && OpL == OpR && Val.match(OpL);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp1371 SDValue OpR = GetPromotedInteger(NewRHS); local
1374 // If the width of OpL/OpR excluding the duplicated sign bits is no greater
1380 OpR.getScalarValueSizeInBits() - DAG.ComputeNumSignBits(OpR) + 1;
1384 NewRHS = OpR;

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