| /freebsd-11-stable/contrib/llvm-project/clang/lib/Analysis/ |
| H A D | ThreadSafety.cpp | 1047 bool &Negate);
1426 bool &Negate) {
1432 return getTrylockCallExpr(CallExp->getArg(0), C, Negate);
1436 return getTrylockCallExpr(PE->getSubExpr(), C, Negate);
1438 return getTrylockCallExpr(CE->getSubExpr(), C, Negate);
1440 return getTrylockCallExpr(FE->getSubExpr(), C, Negate);
1443 return getTrylockCallExpr(E, C, Negate);
1447 Negate = !Negate;
1448 return getTrylockCallExpr(UOP->getSubExpr(), C, Negate);
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VFABIDemangling.cpp | 165 const bool Negate = ParseString.consume_front("n"); local
168 if (Negate)
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 254 bool Negate = false; local
346 Negate = true;
358 Negate = true;
370 Negate = true;
383 Negate = true;
396 Negate = true;
409 Negate = true;
482 if (Negate)
|
| /freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | RangedConstraintManager.h | 118 RangeSet Negate(BasicValueFactory &BV, Factory &F) const;
|
| /freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/ |
| H A D | RangeConstraintManager.cpp | 196 RangeSet RangeSet::Negate(BasicValueFactory &BV, Factory &F) const { function in class:RangeSet
492 return V->Intersect(BV, F, R->Negate(BV, F));
496 return R->Negate(BV, F);
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3926 bool HasVSX, bool &Swap, bool &Negate) {
3928 Negate = false;
3943 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
3944 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break;
3945 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break;
3946 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break;
3987 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
3988 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
3989 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break;
3990 case ISD::SETULE: CC = ISD::SETUGT; Negate
3925 getVCmpInst(MVT VecVT, ISD::CondCode CC, bool HasVSX, bool &Swap, bool &Negate) argument
4135 bool Swap, Negate; local
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | ControlHeightReduction.cpp | 1527 // Negate the predicate if an ICmp if it's used only by branches or selects by
1975 Value *Negate = IRB.CreateXor( local
1977 MergedCondition = IRB.CreateAnd(MergedCondition, Negate);
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 105 bool Negate = false) {
111 uint32_t K = Negate ?
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2348 bool Negate = false; local
2353 Negate = true;
2369 if (Negate)
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 11938 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, local
11941 return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate);
14242 bool &Negate) {
14251 Negate = !Negate;
14252 return SearchLoopIntrinsic(N.getOperand(0), CC, Imm, Negate);
14265 return SearchLoopIntrinsic(N->getOperand(0), CC, Imm, Negate);
14296 bool Negate = false; local
14317 SDValue Int = SearchLoopIntrinsic(Cond, CC, Imm, Negate);
14321 if (Negate)
14241 SearchLoopIntrinsic(SDValue N, ISD::CondCode &CC, int &Imm, bool &Negate) argument
[all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1843 /// Negate==true on this sub-tree)
1912 /// \p Negate is true if we want this sub-tree being negated just by changing
1915 AArch64CC::CondCode &OutCC, bool Negate, SDValue CCOp,
1924 if (Negate)
1990 assert(!Negate);
1995 // Negate the left sub-tree if possible, otherwise negate the result.
2000 NegateAfterAll = !Negate;
2003 assert(!Negate && "Valid conjunction/disjunction tree");
9845 // Negate the result.
1914 emitConjunctionRec(SelectionDAG &DAG, SDValue Val, AArch64CC::CondCode &OutCC, bool Negate, SDValue CCOp, AArch64CC::CondCode Predicate) argument
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | [all...] |