Searched refs:Lo1 (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp751 SDValue Lo1 = Node->getOperand(2); local
755 SDValue ops[] = {cond, Hi1, Lo1, Hi2, Lo2};
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp1016 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, local
1028 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) };
1031 SDValue Args[] = { SDValue(Lo0, 0), SDValue(Lo1, 0), N->getOperand(2) };
H A DAMDGPUInstructionSelector.cpp342 MachineOperand Lo1(getSubOperand64(I.getOperand(1), HalfRC, AMDGPU::sub0));
352 .add(Lo1)
362 .add(Lo1)
H A DSIISelLowering.cpp3998 SDValue Lo1, Hi1; local
3999 std::tie(Lo1, Hi1) = DAG.SplitVectorOperand(Op.getNode(), 1);
4003 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1,
4019 SDValue Lo1, Hi1; local
4020 std::tie(Lo1, Hi1) = DAG.SplitVectorOperand(Op.getNode(), 1);
4026 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, Lo2,
7528 SDValue Lo1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, Zero); local
7530 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp2610 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; local
2613 GetSplitVector(N->getOperand(1), Lo1, Hi1);
2618 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8374 ConstantSDNode *Lo1 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt+2)); local
8376 if (!Lo0 || !Hi0 || !Lo1 || !Hi1)
8380 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32)

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