| /freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_utils.cpp | 121 LogWriter *LW = reinterpret_cast<LogWriter *>(InternalAlloc(sizeof(LogWriter))); variable
122 new (LW) LogWriter(Vmo);
123 return LW;
126 void LogWriter::Close(LogWriter *LW) { argument
127 LW->~LogWriter();
128 InternalFree(LW);
184 LogWriter *LW = allocate<LogWriter>();
185 new (LW) LogWriter(Fd);
186 return LW;
189 void LogWriter::Close(LogWriter *LW) {
[all...] |
| H A D | xray_basic_logging.cpp | 88 LogWriter* LW = LogWriter::Open(); variable
89 if (LW == nullptr)
90 return LW;
112 LW->WriteAll(reinterpret_cast<char *>(&Header),
114 return LW;
119 static LogWriter *LW = nullptr; variable
120 pthread_once(&OnceInit, +[] { LW = getLog(); });
121 return LW;
161 LogWriter *LW = getGlobalLog(); variable
162 if (LW
261 LogWriter *LW = getGlobalLog(); variable
[all...] |
| H A D | xray_profiling.cpp | 244 LogWriter *LW = LogWriter::Open(); variable
245 if (LW == nullptr) {
252 LW->WriteAll(reinterpret_cast<const char *>(B.Data),
257 LogWriter::Close(LW);
|
| H A D | xray_fdr_logging.cpp | 341 LogWriter *LW = LogWriter::Open(); variable
342 if (LW == nullptr) {
350 LW->WriteAll(reinterpret_cast<char *>(&Header),
374 LW->WriteAll(reinterpret_cast<char *>(&ExtentsRecord),
377 LW->WriteAll(reinterpret_cast<char *>(B.Data),
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 205 return Mips::LW;
355 MachineInstr *LW = local
356 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
362 if (!constrainSelectedInstRegOperands(*LW, TII, TRI, RBI))
367 LW->getOperand(0).setReg(DestTmp);
570 MachineInstr *LWGOT = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
626 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
|
| H A D | MicroMipsSizeReduction.cpp | 157 // Attempts to reduce LW/SW instruction into LWSP/SWSP,
161 // Attempts to reduce two LW/SW instructions into LWP/SWP instruction,
240 {RT_TwoInstr, OpCodes(Mips::LW, Mips::LWP_MM), ReduceXWtoXWP,
242 {RT_OneInstr, OpCodes(Mips::LW, Mips::LWSP_MM), ReduceXWtoXWSP,
355 !(MI->getOpcode() == Mips::LW || MI->getOpcode() == Mips::LW_MM ||
468 bool ReduceToLwp = (MI1->getOpcode() == Mips::LW) ||
|
| H A D | MipsSEInstrInfo.cpp | 49 if ((Opc == Mips::LW) || (Opc == Mips::LD) ||
333 Opc = Mips::LW;
362 Opc = Mips::LW;
366 Opc = Mips::LW;
|
| H A D | MipsFastISel.cpp | 422 emitInst(Mips::LW, DestReg)
439 emitInst(Mips::LW, DestReg)
766 Opc = Mips::LW;
|
| H A D | MipsBranchExpansion.cpp | 505 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA)
|
| /freebsd-11-stable/contrib/llvm-project/lld/ELF/Arch/ |
| H A D | RISCV.cpp | 48 LW = 0x2003, enumerator in enum:lld::elf::Op
159 uint32_t load = config->is64 ? LD : LW;
178 write32le(buf + 4, itype(config->is64 ? LD : LW, X_T3, X_T3, lo12(offset)));
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsNaClELFStreamer.cpp | 224 case Mips::LW:
|
| H A D | MipsTargetStreamer.cpp | 293 emitLoadWithImmOffset(Mips::LW, GPReg, Mips::SP, Offset, GPReg, IDLoc, STI);
1181 // and adds a corresponding LW after every JAL.
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 221 case RISCV::LW:
|
| H A D | RISCVMergeBaseOffset.cpp | 214 case RISCV::LW:
|
| H A D | RISCVInstrInfo.cpp | 48 case RISCV::LW:
153 RISCV::LW : RISCV::LD;
|
| H A D | RISCVExpandPseudoInsts.cpp | 681 SecondOpcode = STI.is64Bit() ? RISCV::LD : RISCV::LW;
696 unsigned SecondOpcode = STI.is64Bit() ? RISCV::LD : RISCV::LW;
|
| H A D | RISCVISelLowering.cpp | 1216 BuildMI(*BB, MI, DL, TII.get(RISCV::LW), LoReg)
1220 BuildMI(*BB, MI, DL, TII.get(RISCV::LW), HiReg)
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 1722 SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW;
1741 unsigned SecondOpcode = isRV64() ? RISCV::LD : RISCV::LW;
1846 emitLoadStoreSymbol(Inst, RISCV::LW, IDLoc, Out, /*HasTmpReg=*/false);
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 2340 // We need a NOP between the JALR and the LW:
2924 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, DstReg,
2929 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, GPReg,
2969 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, TmpReg,
3036 TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, GPReg,
3269 TOut.emitRRX(Mips::LW, ATReg, GPReg, MCOperand::createExpr(GotExpr),
3459 TOut.emitRRI(Mips::LW, FirstReg, TmpReg, 0, IDLoc, STI);
3460 TOut.emitRRI(Mips::LW, nextReg(FirstReg), TmpReg, 4, IDLoc, STI);
5173 unsigned Opcode = IsLoad ? Mips::LW : Mips::SW;
|
| /freebsd-11-stable/contrib/netbsd-tests/usr.bin/netpgpverify/ |
| H A D | t_netpgpverify.sh | 4283 c68kA9KJ6vvhsXsbdzRhKzSCcTXKZC1XufrByw/LW+uJ2SAGe1BVrAOcptcKoRYb
|