| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 61 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyTargetTransformInfo.cpp | 57 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Operator.h | 144 OpC == Instruction::LShr;
449 : public ConcreteOperator<PossiblyExactOperator, Instruction::LShr> {
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| H A D | Instruction.h | 166 return getOpcode() == Shl || getOpcode() == LShr;
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCExpr.h | 446 LShr, ///< Logical shift right. enumerator in enum:llvm::MCBinaryExpr::Opcode
549 return create(LShr, LHS, RHS, Ctx);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InterleavedLoadCombinePass.cpp | 168 LShr, enumerator in enum:__anon1731::Polynomial::BOps
485 pushBOperation(LShr, C);
587 case LShr:
588 OS << "LShr ";
924 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | SpeculativeExecution.cpp | 223 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreLowerThreadLocal.cpp | 99 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineMulDivRem.cpp | 79 if (I->getOpcode() == Instruction::LShr && !I->isExact()) {
851 BinaryOperator *LShr = BinaryOperator::CreateLShr(Op0, C1); local
853 LShr->setIsExact();
854 return LShr;
875 BinaryOperator *LShr = BinaryOperator::CreateLShr(Op0, N); local
877 LShr->setIsExact();
878 return LShr;
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| H A D | InstCombineSimplifyDemanded.cpp | 526 case Instruction::LShr: {
599 BinaryOperator *LShr = BinaryOperator::CreateLShr(I->getOperand(0), local
601 LShr->setIsExact(cast<BinaryOperator>(I)->isExact());
602 return InsertNewInstWith(LShr, *I);
957 bool isLshr = (Shr->getOpcode() == Instruction::LShr);
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| H A D | InstCombineShifts.cpp | 523 case Instruction::LShr:
643 case Instruction::LShr:
744 assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | Operations.cpp | 27 Ops.push_back(binOpDescriptor(1, Instruction::LShr));
105 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/ |
| H A D | PoisonChecking.cpp | 174 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonLoopIdiomRecognition.cpp | 988 case Instruction::LShr: // Shift right is ok.
1240 case Instruction::LShr:
1275 case Instruction::LShr:
1289 if (Opc == Instruction::Shl || Opc == Instruction::LShr)
1572 case Instruction::LShr:
1687 if (I->getOpcode() != Instruction::LShr)
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| /freebsd-11-stable/contrib/llvm-project/lldb/source/Expression/ |
| H A D | IRInterpreter.cpp | 575 case Instruction::LShr:
701 case Instruction::LShr:
778 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | DemandedBits.cpp | 200 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 266 if (I.getOpcode() != Instruction::LShr)
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 117 case Instruction::LShr:
135 if (UseInst->getOpcode() == Instruction::LShr) {
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCExpr.cpp | 122 case MCBinaryExpr::LShr: OS << ">>"; break;
856 case MCBinaryExpr::LShr: Result = uint64_t(LHS) >> uint64_t(RHS); break;
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Instruction.cpp | 133 case Instruction::LShr:
361 case LShr: return "lshr";
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| H A D | ConstantFold.cpp | 267 case Instruction::LShr: {
1072 case Instruction::LShr:
1283 case Instruction::LShr:
1299 case Instruction::LShr:
1379 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.cpp | 156 case Instruction::LShr:
402 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr ||
|
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 156 case Instruction::LShr:
438 J->getOpcode() == Instruction::LShr)) {
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1978 // If AShr or LShr, then we need to make sure the operand0 is sign extended.
1979 if (Opcode == Instruction::AShr || Opcode == Instruction::LShr) {
1985 bool IsZExt = Opcode == Instruction::LShr;
2004 case Instruction::LShr:
2027 case Instruction::LShr:
2062 case Instruction::LShr:
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| /freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | BasicTTIImpl.h | 1154 Cost += ConcreteTTI->getArithmeticInstrCost(BinaryOperator::LShr, RetTy,
1385 Cost += ConcreteTTI->getArithmeticInstrCost(Instruction::LShr, RetTy,
1449 Cost += ConcreteTTI->getArithmeticInstrCost(Instruction::LShr, MulTy,
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