Searched refs:ExtElt (Results 1 - 6 of 6) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp2098 auto *ExtElt = dyn_cast<ExtractElementInst>(BitCast.getOperand(0)); local
2099 if (!ExtElt || !ExtElt->hasOneUse())
2108 unsigned NumElts = ExtElt->getVectorOperandType()->getNumElements();
2110 auto *NewBC = IC.Builder.CreateBitCast(ExtElt->getVectorOperand(),
2112 return ExtractElementInst::Create(NewBC, ExtElt->getIndexOperand());
H A DInstCombineVectorOps.cpp523 ExtractElementInst *ExtElt,
526 VectorType *ExtVecType = ExtElt->getVectorOperandType();
546 Value *ExtVecOp = ExtElt->getVectorOperand();
550 : ExtElt->getParent();
582 IC.InsertNewInstWith(WideVec, *ExtElt->getParent()->getFirstInsertionPt());
522 replaceExtractElements(InsertElementInst *InsElt, ExtractElementInst *ExtElt, InstCombiner &IC) argument
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp[all...]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp6638 SDValue ExtElt = DAG.getNode(ISD::ZERO_EXTEND, SL, IntVT, Trunc);
6644 DAG.getNode(ISD::SHL, SL, IntVT, ExtElt, ShiftAmount);
H A DDAGCombiner.cpp17029 static SDValue scalarizeExtractedBinop(SDNode *ExtElt, SelectionDAG &DAG, argument
17032 SDValue Vec = ExtElt->getOperand(0);
17033 SDValue Index = ExtElt->getOperand(1);
17052 SDLoc DL(ExtElt);
17053 EVT VT = ExtElt->getValueType(0);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp13645 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, local
13648 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt);
13651 DCI.AddToWorklist(ExtElt.getNode());

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