Searched refs:Ext1 (Results 1 - 7 of 7) sorted by relevance
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 177 case FixLen::Ext1:
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| H A D | MsgPackReader.cpp | 120 return createExt(Obj, FixLen::Ext1);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 9009 /// Check if Ext1 and Ext2 are extends of the same type, doubling the bitwidth
9011 static bool areExtractExts(Value *Ext1, Value *Ext2) { argument
9017 if (!match(Ext1, m_ZExtOrSExt(m_Value())) ||
9019 !areExtDoubled(cast<Instruction>(Ext1)) ||
9055 auto Ext1 = cast<Instruction>(I->getOperand(0));
9057 if (areExtractShuffleVectors(Ext1, Ext2)) {
9058 Ops.push_back(&Ext1->getOperandUse(0));
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 13326 SDValue Ext1 = FirstInput.getOperand(0);
13328 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
13332 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1));
13336 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 ||
13337 Ext1.getOperand(0) != Ext2.getOperand(0))
13350 SDValue SrcVec = Ext1.getOperand(0);
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | [all...] |
| /freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 14935 /// Check if Ext1 and Ext2 are extends of the same type, doubling the bitwidth
14937 static bool areExtractExts(Value *Ext1, Value *Ext2) { argument
14943 if (!match(Ext1, m_ZExtOrSExt(m_Value())) ||
14945 !areExtDoubled(cast<Instruction>(Ext1)) ||
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| /freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 17055 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); local
17056 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1);
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