Searched refs:DefRegs (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp90 SmallVector<unsigned, 4> DefRegs; member in struct:__anon1751::CopyTracker::CopyInfo
124 RegsToInvalidate.insert(I->second.DefRegs.begin(),
125 I->second.DefRegs.end());
140 markRegsUnavailable(I->second.DefRegs, TRI);
167 if (!is_contained(Copy.DefRegs, Def))
168 Copy.DefRegs.push_back(Def);
191 if (CI->second.DefRegs.size() != 1)
193 MCRegUnitIterator RUI(CI->second.DefRegs[0], &TRI);
H A DLiveVariables.cpp513 SmallVector<unsigned, 4> DefRegs; local
535 DefRegs.push_back(MOReg);
554 for (unsigned i = 0, e = DefRegs.size(); i != e; ++i) {
555 unsigned MOReg = DefRegs[i];
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp1124 SmallVector<unsigned, 16> DefRegs(OpdMapper.getVRegs(0));
1175 for (unsigned DefIdx = 0, e = DefRegs.size(); DefIdx != e; ++DefIdx) {
1179 B.buildExtractVectorElement(DefRegs[DefIdx], TmpReg, IdxReg);
1589 SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
1594 if (DefRegs.empty()) {
1610 setRegsToType(MRI, DefRegs, HalfTy);
1612 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0]);
1613 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1]);
1668 SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0));
1673 if (DefRegs
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp469 std::set<RegisterRef> DefRegs; local
479 DefRegs.insert(Op);
499 if (!Op.isReg() || !DefRegs.count(Op))
H A DHexagonConstPropagation.cpp2840 SmallVector<unsigned,2> DefRegs;
2849 DefRegs.push_back(R);
2862 for (unsigned i = 0, n = DefRegs.size(); i < n; ++i) {
2863 unsigned R = DefRegs[i];
2952 AllDefs = (ChangedNum == DefRegs.size());
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9985 DenseMap<unsigned, bool> DefRegs; local
9990 DefRegs[OI->getReg()] = true;
10005 if (!DefRegs[Reg])
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp[all...]

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