Searched refs:ADDrr (Results 1 - 11 of 11) sorted by relevance
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.h | 61 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
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H A D | SparcFrameLowering.cpp | 44 unsigned ADDrr, 68 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) 81 BuildMI(MBB, MBBI, dl, TII.get(ADDrr), SP::O6) 121 SAVErr = SP::ADDrr; 214 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); 240 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); 40 emitSPAdjustment(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, int NumBytes, unsigned ADDrr, unsigned ADDri) const argument
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H A D | SparcRegisterInfo.cpp | 137 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1) 155 BuildMI(*MI.getParent(), II, dl, TII.get(SP::ADDrr), SP::G1).addReg(SP::G1)
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H A D | DelaySlotFiller.cpp | 391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) 503 case SP::ADDrr:
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H A D | SparcAsmPrinter.cpp | 146 EmitBinary(OutStreamer, SP::ADDrr, RS1, RS2, RD, STI);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstructionSelector.cpp | 106 unsigned ADDrr; member in struct:__anon2162::ARMInstructionSelector::OpcodeCache 321 STORE_OPCODE(ADDrr, ADDrr); 737 MIB->setDesc(TII.get(Opcodes.ADDrr)); 1069 I.setDesc(TII.get(Opcodes.ADDrr));
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H A D | ARMBaseInstrInfo.cpp | 209 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) 229 get(isSub ? ARM::SUBrr : ARM::ADDrr), WBReg) 2310 {ARM::ADDSrr, ARM::ADDrr}, 2785 (OI->getOpcode() == ARM::ADDrr || OI->getOpcode() == ARM::t2ADDrr || 2837 case ARM::ADDrr: 3220 case ARM::ADDrr: 3230 case ARM::ADDrr: 3238 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::ADDri : ARM::SUBri; 3241 NewUseOpc = UseOpc == ARM::ADDrr ? ARM::SUBri : ARM::ADDri;
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H A D | ARMAsmPrinter.cpp | 1554 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr) 1800 EmitToStreamer(*OutStreamer, MCInstBuilder(ARM::ADDrr)
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H A D | ARMFastISel.cpp | 1761 Opc = isThumb2 ? ARM::t2ADDrr : ARM::ADDrr;
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FixupLEAs.cpp | 507 const MCInstrDesc &ADDrr = TII->get(getADDrrFromLEA(Opcode)); local 510 BuildMI(MBB, I, MI.getDebugLoc(), ADDrr, DstR).addReg(DstR).add(Src);
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 10100 case ARM::ADDrsi: newOpc = ARM::ADDrr; break;
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