Searched refs:regChainOffset (Results 1 - 4 of 4) sorted by relevance

/freebsd-10.3-release/sys/dev/ath/ath_hal/ar9002/
H A Dar9287_reset.c54 uint32_t regChainOffset; local
97 regChainOffset = i * 0x1000;
458 uint32_t regChainOffset, regval; local
489 regChainOffset = i * 0x1000;
491 OS_REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
494 OS_REG_WRITE(ah, AR_PHY_TIMING_CTRL4_CHAIN(0) + regChainOffset,
496 + regChainOffset)
506 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
509 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
512 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
[all...]
H A Dar9280_olc.c246 int regChainOffset; local
248 regChainOffset = ar5416GetRegChainOffset(ah, i);
257 OS_REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
294 uint32_t regChainOffset; local
343 regChainOffset = ar5416GetRegChainOffset(ah, i);
H A Dar9285_reset.c576 uint32_t regChainOffset; local
608 regChainOffset = ar5416GetRegChainOffset(ah, i);
/freebsd-10.3-release/sys/dev/ath/ath_hal/ar5416/
H A Dar5416_reset.c1529 uint8_t txRxAttenLocal, int regChainOffset, int i)
1536 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1539 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1542 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1545 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1549 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1552 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
1560 AR_PHY_RXGAIN + regChainOffset,
1563 AR_PHY_RXGAIN + regChainOffset,
1567 AR_PHY_RXGAIN + regChainOffset,
1526 ar5416SetDefGainValues(struct ath_hal *ah, const MODAL_EEP_HEADER *pModal, const struct ar5416eeprom *eep, uint8_t txRxAttenLocal, int regChainOffset, int i) argument
1586 int regChainOffset; local
1612 int i, regChainOffset; local
2220 int regChainOffset; local
2302 int regOffset, regChainOffset; local
2347 uint32_t regChainOffset; local
[all...]

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