Searched refs:f128 (Results 1 - 15 of 15) sorted by relevance
/freebsd-10.3-release/contrib/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 415 if (RetVT == MVT::f128) 418 if (RetVT == MVT::f128) 433 if (OpVT == MVT::f128) 440 if (OpVT == MVT::f128) 481 } else if (OpVT == MVT::f128) { 531 } else if (OpVT == MVT::f128) { 559 if (RetVT == MVT::f128) 570 if (RetVT == MVT::f128) 581 if (RetVT == MVT::f128) 599 if (RetVT == MVT::f128) [all...] |
/freebsd-10.3-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 84 assert((LocVT == MVT::f32 || LocVT == MVT::f128 89 unsigned size = (LocVT == MVT::f128) ? 16 : 8; 90 unsigned alignment = (LocVT == MVT::f128) ? 16 : 8; 103 else if (LocVT == MVT::f128 && Offset < 16*8) 1013 if (!VA.isRegLoc() || (ValTy != MVT::f64 && ValTy != MVT::f128)) 1036 assert(ValTy == MVT::f128 && "Unexpected type!"); 1117 // fixupVariableFloatArgs() may create bitcasts from f128 to i128. But 1119 if (!VA.needsCustom() || VA.getValVT() != MVT::f128 1126 if (VA.needsCustom() && VA.getValVT() == MVT::f128 1377 addRegisterClass(MVT::f128, [all...] |
H A D | SparcISelLowering.h | 160 // Do not shrink FP constpool if VT == MVT::f128. 162 return VT != MVT::f128;
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/freebsd-10.3-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 54 addRegisterClass(MVT::f128, &AArch64::FPR128RegClass); 184 setOperationAction(ISD::ConstantFP, MVT::f128, Legal); 223 // Virtually no operation on f128 is legal, but LLVM can't expand them when 225 setOperationAction(ISD::FABS, MVT::f128, Expand); 226 setOperationAction(ISD::FADD, MVT::f128, Custom); 227 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); 228 setOperationAction(ISD::FCOS, MVT::f128, Expand); 229 setOperationAction(ISD::FDIV, MVT::f128, Custom); 230 setOperationAction(ISD::FMA, MVT::f128, Expand); 231 setOperationAction(ISD::FMUL, MVT::f128, Custo [all...] |
H A D | AArch64InstrInfo.cpp | 423 RC->hasType(MVT::f128)) 469 || RC->hasType(MVT::f128))
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/freebsd-10.3-release/contrib/llvm/lib/IR/ |
H A D | ValueTypes.cpp | 125 case MVT::f128: return "f128"; 196 case MVT::f128: return Type::getFP128Ty(Context); 261 case Type::FP128TyID: return MVT(MVT::f128);
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/freebsd-10.3-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ValueTypes.h | 57 f128 = 11, // This is a 128 bit floating point value enumerator in enum:llvm::MVT::SimpleValueType 405 case f128: 477 return MVT::f128; 600 /// with 128 bits - this returns f128 rather than ppcf128.
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H A D | SelectionDAG.h | 1024 case MVT::f128: return APFloat::IEEEquad;
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/freebsd-10.3-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 76 addRegisterClass(MVT::f128, &SystemZ::FP128BitRegClass); 243 // We have fused multiply-addition for f32 and f64 but not f128. 246 setOperationAction(ISD::FMA, MVT::f128, Expand); 248 // Needed so that we don't try to implement f128 constant loads using 255 setTruncStoreAction(MVT::f128, MVT::f32, Expand); 256 setTruncStoreAction(MVT::f128, MVT::f64, Expand); 298 case MVT::f128: 494 else if (VT == MVT::f128) 518 if (VT == MVT::f128) 1194 // Leave f128 comparison [all...] |
/freebsd-10.3-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 67 case MVT::f128: return "MVT::f128";
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/freebsd-10.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 2004 case MVT::f128: LC = Call_F128; break; 2141 case MVT::f128: LC = RTLIB::SINCOS_F128; break; 2191 case MVT::f128: LC = RTLIB::SINCOS_F128; break;
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H A D | LegalizeFloatTypes.cpp | 38 VT == MVT::f128 ? Call_F128 :
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H A D | TargetLowering.cpp | 120 assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
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H A D | SelectionDAG.cpp | 1122 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
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H A D | DAGCombiner.cpp | 9055 case MVT::f128:
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