Searched refs:ShAmt (Results 1 - 23 of 23) sorted by relevance

/freebsd-10.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp599 unsigned ShAmt = SA->getZExtValue(); local
603 if (ShAmt >= BitWidth)
606 // If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
611 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
614 int Diff = ShAmt-C1;
628 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
638 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 &&
641 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
645 TLO.DAG.getConstant(ShAmt, ShT
687 unsigned ShAmt = SA->getZExtValue(); local
740 unsigned ShAmt = SA->getZExtValue(); local
792 unsigned ShAmt = ExVT.getScalarType().getSizeInBits(); local
950 ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1)); local
1015 SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType()); local
1156 const APInt &ShAmt local
2519 unsigned ShAmt = d.countTrailingZeros(); local
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H A DLegalizeVectorOps.cpp455 SDValue Lo, Hi, ShAmt; local
458 ShAmt = DAG.getConstant(BitOffset, TLI.getShiftAmountTy(WideVT));
459 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt);
468 ShAmt = DAG.getConstant(SrcEltBits - Offset,
470 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt);
487 ShAmt = DAG.getConstant(WideBits - SrcEltBits,
489 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt);
490 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt);
H A DDAGCombiner.cpp3120 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); local
3122 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, BSwap, ShAmt);
3124 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, BSwap, ShAmt);
3126 DAG.getNode(ISD::SHL, SDLoc(N), VT, BSwap, ShAmt),
3127 DAG.getNode(ISD::SRL, SDLoc(N), VT, BSwap, ShAmt));
4004 uint64_t ShAmt = N1C->getZExtValue()+64-N0.getValueSizeInBits(); local
4006 DAG.getConstant(~0ULL >> ShAmt, VT));
4057 unsigned ShAmt = UnknownBits.countTrailingZeros(); local
4060 if (ShAmt) {
4062 DAG.getConstant(ShAmt, getShiftAmountT
4980 SDValue ShAmt = N0.getOperand(1); local
5239 unsigned ShAmt = 0; local
8325 unsigned ShAmt = Imm.countTrailingZeros(); local
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H A DSelectionDAG.cpp1899 unsigned ShAmt = SA->getZExtValue(); local
1902 if (ShAmt >= BitWidth)
1907 KnownZero <<= ShAmt; local
1908 KnownOne <<= ShAmt; local
1910 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1916 unsigned ShAmt = SA->getZExtValue(); local
1919 if (ShAmt >= BitWidth)
1924 KnownZero = KnownZero.lshr(ShAmt);
1925 KnownOne = KnownOne.lshr(ShAmt);
1927 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1933 unsigned ShAmt = SA->getZExtValue(); local
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H A DSelectionDAGBuilder.cpp4865 SDValue ShAmt = getValue(I.getArgOperand(1));
4866 if (isa<ConstantSDNode>(ShAmt)) {
4905 ShOps[0] = ShAmt;
4907 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, &ShOps[0], 2);
4909 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt);
4912 getValue(I.getArgOperand(0)), ShAmt);
/freebsd-10.3-release/contrib/llvm/lib/Transforms/InstCombine/
H A DInstCombineShifts.cpp370 Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); local
372 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
687 unsigned ShAmt = Op1C->getZExtValue(); local
692 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) {
699 ComputeNumSignBits(I.getOperand(0)) > ShAmt) {
726 unsigned ShAmt = Op1C->getZExtValue(); local
736 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
746 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
766 unsigned ShAmt = Op1C->getZExtValue(); local
792 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){
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H A DInstCombineCompares.cpp967 ConstantInt *ShAmt) {
974 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits);
1195 ConstantInt *ShAmt; local
1196 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : 0;
1207 if (ShAmt) {
1214 int ShAmtVal = TyBits - ShAmt->getLimitedValue(TyBits);
1228 NewCst = ConstantExpr::getLShr(RHS, ShAmt);
1230 NewCst = ConstantExpr::getShl(RHS, ShAmt);
1235 NewCst, ShAmt) != RHS) {
1247 NewAndCST = ConstantExpr::getLShr(AndCST, ShAmt);
966 FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, ConstantInt *ShAmt) argument
1355 ConstantInt *ShAmt = dyn_cast<ConstantInt>(LHSI->getOperand(1)); local
2966 unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits); local
2979 uint64_t ShAmt = 0; local
2992 MaskV <<= ShAmt; local
2995 CmpV <<= ShAmt; local
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H A DInstCombineCasts.cpp1097 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize);
1098 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"),
1099 ShAmt);
1110 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); local
1111 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext");
1112 return BinaryOperator::CreateAShr(Res, ShAmt);
1139 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; local
1140 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt);
1702 ConstantInt *ShAmt = 0; local
1704 m_ConstantInt(ShAmt))))
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H A DInstCombineAddSub.cpp962 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); local
963 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext");
964 return BinaryOperator::CreateAShr(NewShl, ShAmt);
H A DInstCombineMulDivRem.cpp925 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), local
927 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName());
H A DInstCombineAndOrXor.cpp1404 unsigned ShAmt = local
1407 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size()))
1410 unsigned ByteShift = ShAmt >> 3;
/freebsd-10.3-release/contrib/llvm/tools/clang/lib/Lex/
H A DPPExpressions.cpp600 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); local
602 Overflow = ShAmt >= LHS.Val.getBitWidth();
604 ShAmt = LHS.Val.getBitWidth()-1;
605 Res = LHS.Val << ShAmt;
607 Res = llvm::APSInt(LHS.Val.sshl_ov(ShAmt, Overflow), false);
613 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); local
614 if (ShAmt >= LHS.getBitWidth())
615 Overflow = true, ShAmt = LHS.getBitWidth()-1;
616 Res = LHS.Val >> ShAmt;
/freebsd-10.3-release/contrib/llvm/lib/Transforms/Scalar/
H A DScalarReplAggregates.cpp836 int ShAmt = 0; local
841 ShAmt = TD.getTypeStoreSizeInBits(NTy) -
844 ShAmt = Offset;
850 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth())
852 ConstantInt::get(FromVal->getType(), ShAmt));
853 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth())
855 ConstantInt::get(FromVal->getType(), -ShAmt));
984 int ShAmt local
1000 Mask <<= ShAmt; local
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H A DSROA.cpp1773 uint64_t ShAmt = 8*Offset; local
1775 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset);
1776 if (ShAmt) {
1777 V = IRB.CreateLShr(V, ShAmt, Name + ".shift");
1802 uint64_t ShAmt = 8*Offset; local
1804 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset);
1805 if (ShAmt) {
1806 V = IRB.CreateShl(V, ShAmt, Name + ".shift");
1810 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) {
1811 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt);
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/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp93 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
458 unsigned ShAmt) {
465 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1));
586 unsigned ShAmt = Log2_32(RHSC); local
588 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
614 unsigned ShAmt = 0; local
624 ShAmt = Sh->getZExtValue();
625 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt))
628 ShAmt
456 isShifterOpProfitable(const SDValue &Shift, ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt) argument
685 unsigned ShAmt = Log2_32(RHSC); local
755 unsigned ShAmt = 0; local
820 unsigned ShAmt = 0; local
1380 unsigned ShAmt = 0; local
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H A DARMBaseInstrInfo.cpp3312 unsigned ShAmt = DefMI->getOperand(3).getImm(); local
3313 if (ShAmt == 0 || ShAmt == 2)
3343 unsigned ShAmt = DefMI->getOperand(3).getImm(); local
3344 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3)
3614 unsigned ShAmt = local
3616 if (ShAmt
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H A DARMISelLowering.cpp3898 SDValue ShAmt = Op.getOperand(2); local
3905 DAG.getConstant(VTBits, MVT::i32), ShAmt);
3906 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt);
3907 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt,
3916 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt);
3934 SDValue ShAmt = Op.getOperand(2); local
3939 DAG.getConstant(VTBits, MVT::i32), ShAmt);
3941 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt,
3943 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt);
3950 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt);
8849 SDValue ShAmt = N00.getOperand(1); local
[all...]
/freebsd-10.3-release/contrib/llvm/lib/IR/
H A DConstantFold.cpp256 unsigned ShAmt = Amt->getZExtValue(); local
258 if ((ShAmt & 7) != 0)
260 ShAmt >>= 3;
263 if (ByteStart >= CSize-ShAmt)
267 if (ByteStart+ByteSize+ShAmt <= CSize)
268 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize);
278 unsigned ShAmt = Amt->getZExtValue(); local
280 if ((ShAmt & 7) != 0)
282 ShAmt >>= 3;
285 if (ByteStart+ByteSize <= ShAmt)
[all...]
/freebsd-10.3-release/contrib/llvm/lib/Analysis/
H A DValueTracking.cpp1160 const APInt *ShAmt; local
1161 if (match(U->getOperand(1), m_APInt(ShAmt))) {
1162 Tmp += ShAmt->getZExtValue();
1168 const APInt *ShAmt; local
1169 if (match(U->getOperand(1), m_APInt(ShAmt))) {
1172 Tmp2 = ShAmt->getZExtValue();
/freebsd-10.3-release/contrib/llvm/lib/Support/
H A DAPInt.cpp2048 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const {
2049 Overflow = ShAmt >= getBitWidth();
2051 ShAmt = getBitWidth()-1;
2054 Overflow = ShAmt >= countLeadingZeros();
2056 Overflow = ShAmt >= countLeadingOnes();
2058 return *this << ShAmt;
/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp1223 unsigned ShAmt = MO3.getImm();
1224 if (ShAmt) {
1225 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
1228 << "#" << ShAmt
/freebsd-10.3-release/contrib/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp1841 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { argument
1847 return ShAmt < 4 && ShAmt > 0;
1965 unsigned ShAmt = MI->getOperand(2).getImm(); local
1966 MIB.addReg(0).addImm(1 << ShAmt)
2099 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local
2100 if (!isTruncatedShiftCountForLEA(ShAmt)) return 0;
2110 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0);
2115 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local
2116 if (!isTruncatedShiftCountForLEA(ShAmt)) retur
2141 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local
3415 unsigned ShAmt = getTruncatedShiftCount(MI, 2); local
[all...]
H A DX86ISelLowering.cpp4416 unsigned ShAmt = (i << Shift) % 8; local
4417 Mask |= Elt << ShAmt;
5136 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
5163 ShAmt = NumZeros;
5171 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
5198 ShAmt = NumZeros;
5206 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) {
5212 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) ||
5213 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt))
7355 unsigned ShAmt local
5135 isVectorShiftRight(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument
5170 isVectorShiftLeft(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument
5205 isVectorShift(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG, bool &isLeft, SDValue &ShVal, unsigned &ShAmt) argument
8433 SDValue ShAmt = Op.getOperand(2); local
11002 getTargetVShiftNode(unsigned Opc, SDLoc dl, EVT VT, SDValue SrcOp, SDValue ShAmt, SelectionDAG &DAG) argument
12715 uint64_t ShAmt = 0; local
16802 unsigned ShAmt = TrueC->getAPIntValue().logBase2(); local
17255 unsigned ShAmt = TrueC->getAPIntValue().logBase2(); local
17448 APInt ShAmt = N1C->getAPIntValue(); local
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