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Searched refs:Rn (Results 1 - 8 of 8) sorted by relevance

/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	1230 // Writeback not allowed if Rn is in the target list. 1323 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1373 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1469 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1488 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1508 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1515 if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder))) 1529 if (writeback && (Rn == 15 \|\| Rn == Rt)) 1574 unsigned Rn local 1619 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1809 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1840 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 1862 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2093 unsigned Rn = fieldFromInstruction(Insn, 0, 4); local 2122 unsigned Rn = fieldFromInstruction(Val, 13, 4); local 2140 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 2238 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2563 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2833 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2880 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2928 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 2963 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3106 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3188 unsigned Rn = fieldFromInstruction(Val, 0, 3); local 3203 unsigned Rn = fieldFromInstruction(Val, 0, 3); local 3235 unsigned Rn = fieldFromInstruction(Val, 6, 4); local 3264 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3334 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3398 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3463 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3561 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 3576 unsigned Rn = fieldFromInstruction(Val, 8, 4); local 3604 unsigned Rn = fieldFromInstruction(Val, 9, 4); local 3651 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3711 unsigned Rn = fieldFromInstruction(Val, 13, 4); local 3836 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 3983 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4005 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4028 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4053 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4081 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4106 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4131 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4198 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4264 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4331 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4395 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4465 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4529 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4610 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4756 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4793 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4851 unsigned Rn = fieldFromInstruction(Insn, 16, 4); local 4938 unsigned Rn = fieldFromInstruction(Val, 16, 4); local [all...]
/freebsd-10.3-release/contrib/llvm/tools/lldb/source/Plugins/Instruction/ARM/
H A D	EmulateInstructionARM.cpp	971 // d = UInt(Rdm); n = UInt(Rn); m = UInt(Rdm); setflags = !InITBlock(); 984 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = FALSE; 997 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == '1'); 1934 uint32_t Rn; // This function assumes Rn is the SP, but we should verify that. local 1943 Rn = Bits32 (opcode, 19, 16); 1945 if (Rn != 13) // 13 is the SP reg on ARM. Verify that Rn == SP. 1952 if (wback && ((Rn == 15) \|\| (Rn 2419 uint32_t Rn; // the base register which contains the address of the table of branch lengths local 2558 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 2610 uint32_t Rd, Rn; local 2670 uint32_t Rd, Rn, Rm; local 2753 uint32_t Rn; // the first operand local 2804 uint32_t Rn; // the first operand local 2873 uint32_t Rn; // the first operand local 2928 uint32_t Rn; // the first operand local 3307 uint32_t Rn; // the first operand register local 3564 addr_t Rn = ReadCoreReg (n, &success); local 3702 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 3813 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 3906 uint32_t Rn; // the base register local 4242 addr_t Rn = ReadCoreReg (n, &success); local 4393 addr_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 4518 addr_t Rn = ReadCoreReg (n, &success); local 5283 uint32_t Rd, Rn; local 5353 uint32_t Rd, Rn, Rm; local 5504 uint32_t Rd, Rn; local 5578 uint32_t Rd, Rn, Rm; local 5669 uint32_t Rd, Rn; local 5741 uint32_t Rd, Rn, Rm; local 6243 uint32_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 6620 uint32_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 6904 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 7061 uint64_t Rn = ReadCoreReg (n, &success); local 7311 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 7460 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 8219 uint64_t Rn = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_r0 + n, 0, &success); local 8303 uint32_t Rd, Rn; local 8378 uint32_t Rd, Rn, Rm; local 8470 uint32_t Rd, Rn; local 8544 uint32_t Rd, Rn, Rm; local 8633 uint32_t Rn; // the first operand local 8706 uint32_t Rn; // the first operand local 8785 uint32_t Rn; // the first operand local 8845 uint32_t Rn; // the first operand local 8914 uint32_t Rn; // the first operand local 8982 uint32_t Rn; // the first operand local 9063 uint32_t Rn; // the first operand local 9157 uint32_t Rn; // the first operand local 9219 uint32_t Rn; local 9277 uint32_t Rn, Rm; local 9344 uint32_t Rn; local 9401 uint32_t Rn, Rm; local 9844 uint32_t Rn = ReadCoreReg (n, &success); local 9938 uint32_t Rn = ReadCoreReg (n, &success); local 10033 uint32_t Rn = ReadCoreReg (n, &success); local 10180 uint32_t Rn = ReadCoreReg (n, &success); local 10302 uint32_t Rn = ReadCoreReg (n, &success); local 10453 uint32_t Rn = ReadCoreReg (n, &success); local 10585 uint32_t Rn = ReadCoreReg (n, &success); local 10751 uint32_t Rn = ReadCoreReg (n, &success); local 10944 uint32_t Rn = ReadCoreReg (n, &success); local 11098 uint32_t Rn = ReadCoreReg (n, &success); local 11236 uint32_t Rn = ReadCoreReg (n, &success); local 11407 uint32_t Rn = ReadCoreReg (n, &success); local 11579 uint32_t Rn = ReadCoreReg (n, &success); local 11746 uint32_t Rn = ReadCoreReg (n, &success); local 11918 uint32_t Rn = ReadCoreReg (n, &success); local 12044 uint32_t Rn = ReadCoreReg (n, &success); local 12195 uint32_t Rn = ReadCoreReg (n, &success); local [all...]
/freebsd-10.3-release/contrib/llvm/lib/Target/AArch64/Disassembler/
H A D	AArch64Disassembler.cpp	659 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 679 DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder); 684 DecodeGPR32RegisterClass(Inst, Rn, Address, Decoder); 753 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 758 DecodeGPR64RegisterClass(Inst, Rn, Address, Decoder); 761 DecodeFPR128RegisterClass(Inst, Rn, Address, Decoder); 777 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 790 // Rn_wb, Rt, Rt2, Rn, Imm 791 DecodeGPR64xspRegisterClass(Inst, Rn, Address, Decoder); 800 if (Indexed && V == 0 && Rn ! 860 unsigned Rn = fieldFromInstruction(Val, 5, 5); local 940 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 1034 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 1439 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local 1546 unsigned Rn = fieldFromInstruction(Insn, 5, 5); local [all...]
/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A D	ARMMCCodeEmitter.cpp	740 // [Rn, Rm] 742 // {2-0} = Rn 745 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); local 747 return (Rm << 3) \| Rn; 762 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 844 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. 963 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 974 // {16-13} = Rn 982 Binary \|= Rn << 13; 993 // {17-14} Rn 998 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 1070 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. local 1080 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local 1115 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); local [all...]
/freebsd-10.3-release/contrib/binutils/opcodes/
H A D	arm-dis.c	`3442 unsigned int Rn = (given & 0x000f0000) >> 16; 3450 func (stream, "[%s", arm_regnames[Rn]); 3453 else if (Rn == 15) /* 12-bit negative immediate offset */ 3509 if (Rn == 15) 3523 unsigned int Rn = (given & 0x000f0000) >> 16; 3526 func (stream, "[%s", arm_regnames[Rn]); 3441 unsigned int Rn = (given & 0x000f0000) >> 16; local 3522 unsigned int Rn = (given & 0x000f0000) >> 16; local`
/freebsd-10.3-release/contrib/binutils/gas/config/
H A D	tc-arm.c	`1854 first_error (_("don't use Rn-Rm syntax with non-unit stride")); 4536 [Rn, #offset] .reg=Rn .reloc.exp=offset 4537 [Rn, +/-Rm] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 4538 [Rn, +/-Rm, shift] .reg=Rn .imm=Rm .immisreg=1 .negative=0/1 4545 [Rn], #offset .reg=Rn .reloc.exp=offset 4546 [Rn], 6482 unsigned Rn = inst.operands[2].reg; local 8378 int Rd, Rn; local 8394 int Rd, Rs, Rn; local 8619 int Rd, Rs, Rn; local 8702 int Rd, Rs, Rn; local 9300 int Rn; local [all...]`
/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/
H A D	ARMBaseInstrInfo.cpp	`2714 unsigned Rn = MI->getOperand(2).getReg(); local 2718 return (Rt == Rn) ? 3 : 2; 2738 unsigned Rn = MI->getOperand(3).getReg(); local 2742 return (Rt == Rn) ? 4 : 3; 2747 unsigned Rn = MI->getOperand(3).getReg(); local 2748 return (Rt == Rn) ? 4 : 3; 2783 unsigned Rn = MI->getOperand(2).getReg(); local 2784 return (Rt == Rn) ? 3 : 2;`
/freebsd-10.3-release/contrib/llvm/lib/Target/ARM/AsmParser/
H A D	ARMAsmParser.cpp	4144 // If we have a three-operand form, make sure to set Rn to be the operand 5386 const unsigned Rn = MRI->getEncodingValue(Inst.getOperand(3).getReg()); local 5389 if (Rn == Rt \|\| Rn == Rt2) 5445 unsigned Rn = Inst.getOperand(0).getReg(); local 5450 if (checkLowRegisterList(Inst, 3, Rn, 0, ListContainsBase) && !isThumbTwo()) 5898 TmpInst.addOperand(Inst.getOperand(2)); // Rn 5920 TmpInst.addOperand(Inst.getOperand(2)); // Rn 5944 TmpInst.addOperand(Inst.getOperand(2)); // Rn 5970 TmpInst.addOperand(Inst.getOperand(2)); // Rn 7323 unsigned Rn = Inst.getOperand(0).getReg(); local 7347 unsigned Rn = Inst.getOperand(0).getReg(); local [all...]

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