Searched refs:uart_index (Results 1 - 2 of 2) sorted by relevance

/freebsd-10.2-release/sys/contrib/octeon-sdk/
H A Dcvmx-uart.h81 * @param uart_index Uart to read from (0 or 1)
84 static inline uint8_t cvmx_uart_read_byte(int uart_index) argument
91 lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
95 return cvmx_read_csr(CVMX_MIO_UARTX_RBR(uart_index));
101 * @param uart_index Uart to read from (0 or 1)
106 static inline uint8_t cvmx_uart_read_byte_with_timeout(int uart_index, int *timedout, volatile unsigned timeout) argument
119 lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
124 return cvmx_read_csr(CVMX_MIO_UARTX_RBR(uart_index));
131 * @param uart_index Uart to write to (0 or 1)
134 static inline void cvmx_uart_write_byte(int uart_index, uint8_ argument
155 cvmx_uart_write_string(int uart_index, const char *str) argument
[all...]
H A Dcvmx-uart.c85 * @param uart_index Index of uart to configure
93 int cvmx_uart_setup2(int uart_index, int cpu_clock_hertz, int baudrate) argument
110 cvmx_write_csr(CVMX_MIO_UARTX_FCR(uart_index), fcrval.u64);
113 if (uart_index == 1 && cvmx_uart_simulator_p())
120 cvmx_read_csr(CVMX_MIO_UARTX_LSR(uart_index));
128 cvmx_write_csr(CVMX_MIO_UARTX_LCR(uart_index), lcrval.u64);
130 cvmx_write_csr(CVMX_MIO_UARTX_DLL(uart_index), divisor & 0xff);
131 cvmx_write_csr(CVMX_MIO_UARTX_DLH(uart_index), (divisor>>8) & 0xff);
134 cvmx_write_csr(CVMX_MIO_UARTX_LCR(uart_index), lcrval.u64);
155 cvmx_write_csr(CVMX_MIO_UARTX_MCR(uart_index), mcrva
166 cvmx_uart_setup(int uart_index) argument
[all...]

Completed in 154 milliseconds