Searched refs:VLIW5 (Results 1 - 3 of 3) sorted by relevance

/freebsd-10.2-release/contrib/llvm/lib/Target/R600/
H A DR600MachineScheduler.h85 bool VLIW5; member in class:llvm::R600SchedStrategy
H A DR600Packetizer.cpp61 bool VLIW5; member in class:__anon2596::R600PacketizerList
154 VLIW5 = !MF.getTarget().getSubtarget<AMDGPUSubtarget>().hasCaymanISA();
234 assert (!isTransSlot || VLIW5);
240 !TII->isVectorOnly(MI) && VLIW5) {
H A DR600MachineScheduler.cpp31 VLIW5 = !DAG->MF.getTarget().getSubtarget<AMDGPUSubtarget>().hasCaymanISA();
427 if (!TransSlotOccuped && VLIW5) {

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