Searched refs:SchedModel (Results 1 - 20 of 20) sorted by relevance

/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/
H A DTargetSchedule.h35 MCSchedModel SchedModel; member in class:llvm::TargetSchedModel
67 const MCSchedModel *getMCSchedModel() const { return &SchedModel; }
82 unsigned getProcessorID() const { return SchedModel.getProcessorID(); }
85 unsigned getIssueWidth() const { return SchedModel.IssueWidth; }
93 return SchedModel.getNumProcResourceKinds();
98 return SchedModel.getProcResource(PIdx);
132 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; }
137 return SchedModel.getProcResource(PIdx)->BufferSize;
H A DScheduleDAGInstrs.h86 TargetSchedModel SchedModel; member in class:llvm::ScheduleDAGInstrs
161 const TargetSchedModel *getSchedModel() const { return &SchedModel; }
165 if (!SU->SchedClass && SchedModel.hasInstrSchedModel())
166 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr());
H A DMachineTraceMetrics.h73 TargetSchedModel SchedModel; member in class:llvm::MachineTraceMetrics
111 /// This is an array with SchedModel.getNumProcResourceKinds() entries.
114 /// These numbers have already been scaled by SchedModel.getResourceFactor().
364 // where Kinds = SchedModel.getNumProcResourceKinds().
373 unsigned Factor = SchedModel.getLatencyFactor();
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/
H A DTargetSchedule.cpp32 return EnableSchedModel && SchedModel.hasInstrSchedModel();
57 SchedModel = sm;
62 unsigned NumRes = SchedModel.getNumProcResourceKinds();
64 ResourceLCM = SchedModel.IssueWidth;
66 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits;
70 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth;
72 unsigned NumUnits = SchedModel.getProcResource(Idx)->NumUnits;
107 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass);
118 SCDesc = SchedModel.getSchedClassDesc(SchedClass);
160 return TII->defaultDefLatency(&SchedModel, DefM
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H A DMachineScheduler.cpp1407 const TargetSchedModel *SchedModel);
1434 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
1442 const TargetSchedModel *SchedModel; member in struct:__anon2288::GenericScheduler::SchedBoundary
1532 DAG(0), SchedModel(0), Rem(0), Available(ID, Name+".A"),
1551 return SchedModel->getProcResource(PIdx)->Name;
1574 return RetiredMOps * SchedModel->getMicroOpFactor();
1582 return std::max(CurrCycle * SchedModel->getLatencyFactor(),
1618 const TargetSchedModel *SchedModel; member in class:__anon2288::GenericScheduler
1636 Context(C), DAG(0), SchedModel(0), TRI(0),
1681 init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) { argument
2302 initResourceDelta(const ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel) argument
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H A DMachineTraceMetrics.cpp59 SchedModel.init(*ST.getSchedModel(), &ST, TII);
62 SchedModel.getNumProcResourceKinds());
95 unsigned PRKinds = SchedModel.getNumProcResourceKinds();
108 if (!SchedModel.hasInstrSchedModel())
110 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(MI);
115 PI = SchedModel.getWriteProcResBegin(SC),
116 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) {
127 PRCycles[K] * SchedModel.getResourceFactor(K);
136 unsigned PRKinds = SchedModel.getNumProcResourceKinds();
150 unsigned PRKinds = MTM.SchedModel
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H A DTargetInstrInfo.cpp664 unsigned TargetInstrInfo::defaultDefLatency(const MCSchedModel *SchedModel, argument
669 return SchedModel->LoadLatency;
671 return SchedModel->HighLatency;
724 return defaultDefLatency(ItinData->SchedModel, DefMI);
767 defaultDefLatency(ItinData->SchedModel, DefMI));
H A DScoreboardHazardRecognizer.cpp79 // A nonempty itinerary must have a SchedModel.
80 IssueWidth = ItinData->SchedModel->IssueWidth;
H A DEarlyIfConversion.cpp582 const MCSchedModel *SchedModel; member in class:__anon2256::EarlyIfConverter
690 unsigned CritLimit = SchedModel->MispredictPenalty/2;
780 SchedModel =
H A DScheduleDAGInstrs.cpp60 SchedModel.init(*ST.getSchedModel(), &ST, TII);
274 SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, RegUse,
313 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
390 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr()));
435 dep.setLatency(SchedModel.computeOperandLatency(Def, DefOp, MI, OperIdx));
689 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
H A DIfConversion.cpp157 TargetSchedModel SchedModel; member in class:__anon2265::IfConverter
278 SchedModel.init(*ST.getSchedModel(), &ST, TII);
685 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
1539 unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h48 const TargetSchedModel *SchedModel; member in class:llvm::VLIWResourceModel
59 SchedModel(SM), TotalPackets(0) {
66 Packet.resize(SchedModel->getIssueWidth());
135 const TargetSchedModel *SchedModel; member in struct:llvm::ConvergingVLIWScheduler::SchedBoundary
156 DAG(0), SchedModel(0), Available(ID, Name+".A"),
169 SchedModel = smodel;
192 const TargetSchedModel *SchedModel; member in class:llvm::ConvergingVLIWScheduler
207 DAG(0), SchedModel(0), Top(TopQID, "TopQ"), Bot(BotQID, "BotQ") {}
H A DHexagonMachineScheduler.cpp130 if (Packet.size() >= SchedModel->getIssueWidth()) {
197 SchedModel = DAG->getSchedModel();
199 Top.init(DAG, SchedModel);
200 Bot.init(DAG, SchedModel);
273 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr());
274 if (IssueCount + uops > SchedModel->getIssueWidth())
296 unsigned Width = SchedModel->getIssueWidth();
339 IssueCount += SchedModel->getNumMicroOps(SU->getInstr());
/freebsd-10.2-release/contrib/llvm/include/llvm/MC/
H A DMCInstrItineraries.h113 const MCSchedModel *SchedModel; ///< Basic machine properties. member in class:llvm::InstrItineraryData
121 InstrItineraryData() : SchedModel(&MCSchedModel::DefaultSchedModel),
127 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F),
128 Itineraries(SchedModel->InstrItineraries) {}
/freebsd-10.2-release/contrib/llvm/lib/MC/
H A DMCSubtargetInfo.cpp107 assert(Found->Value && "Missing processor SchedModel value");
113 const MCSchedModel *SchedModel = getSchedModelForCPU(CPU); local
114 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths);
/freebsd-10.2-release/contrib/llvm/include/llvm/Target/
H A DTargetSubtargetInfo.h55 const TargetSchedModel* SchedModel) const {
H A DTargetInstrInfo.h849 unsigned defaultDefLatency(const MCSchedModel *SchedModel,
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/
H A DARMSubtarget.cpp184 SchedModel = getSchedModelForCPU(CPUString);
310 return SchedModel->MispredictPenalty;
H A DARMSubtarget.h204 /// SchedModel - Processor specific instruction costs.
205 const MCSchedModel *SchedModel; member in class:llvm::ARMSubtarget
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DResourcePriorityQueue.cpp321 if (Packet.size() >= InstrItins->SchedModel->IssueWidth) {

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