/freebsd-10.2-release/contrib/llvm/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 80 bool contains(unsigned Reg1, unsigned Reg2) const { argument 81 return contains(Reg1) && contains(Reg2); 525 uint16_t Reg1; member in class:llvm::MCRegUnitRootIterator 527 MCRegUnitRootIterator() : Reg0(0), Reg1(0) {} 531 Reg1 = MCRI->RegUnitRoots[RegUnit][1]; 547 Reg0 = Reg1; 548 Reg1 = 0;
|
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrBuilder.h | 115 unsigned Reg1, bool isKill1, 117 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) 114 addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, bool isKill1, unsigned Reg2, bool isKill2) argument
|
H A D | X86FastISel.cpp | 1738 unsigned Reg1 = getRegForValue(Op1); local 1741 if (Reg1 == 0 || Reg2 == 0) 1757 .addReg(Reg1).addReg(Reg2);
|
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | AggressiveAntiDepBreaker.h | 101 // UnionGroups - Union Reg1's and Reg2's groups to form a new 104 unsigned UnionGroups(unsigned Reg1, unsigned Reg2);
|
H A D | TargetInstrInfo.cpp | 137 unsigned Reg1 = MI->getOperand(Idx1).getReg(); local 146 if (HasDef && Reg0 == Reg1 && 154 Reg0 = Reg1; 168 MI->getOperand(Idx2).setReg(Reg1);
|
H A D | AggressiveAntiDepBreaker.cpp | 79 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) argument 85 unsigned Group1 = GetGroup(Reg1);
|
/freebsd-10.2-release/contrib/llvm/lib/Target/Mips/ |
H A D | Mips16InstrInfo.h | 122 unsigned Reg1, unsigned Reg2) const;
|
H A D | Mips16InstrInfo.cpp | 271 unsigned Reg1, unsigned Reg2) const { 274 // unsigned Reg1 = RegInfo.createVirtualRegister(&Mips::CPU16RegsRegClass); 283 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwConstant32), Reg1); 287 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::AdduRxRyRz16), Reg1); 288 MIB3.addReg(Reg1); 292 MIB4.addReg(Reg1, RegState::Kill); 268 adjustStackPtrBig(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned Reg1, unsigned Reg2) const argument
|
H A D | MipsSEFrameLowering.cpp | 332 unsigned Reg1 = local 336 std::swap(Reg0, Reg1); 341 MCCFIInstruction::createOffset(CSLabel, Reg1, Offset + 4));
|
/freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/InstPrinter/ |
H A D | AArch64InstPrinter.cpp | 329 unsigned Reg1 = MI->getOperand(1).getReg(); local 331 if (isStackReg(Reg0) || isStackReg(Reg1)) { 334 if (Reg0 == AArch64::XSP || Reg1 == AArch64::XSP)
|
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 90 unsigned Reg1, unsigned Reg2); 471 unsigned Reg1, unsigned Reg2) { 477 .addReg(Reg1) 468 createRegSequence(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned Reg1, unsigned Reg2) argument
|
H A D | Thumb2SizeReduction.cpp | 644 unsigned Reg1 = MI->getOperand(1).getReg(); local 649 if (!isARMLowRegister(Reg0) || !isARMLowRegister(Reg1) 655 if (Reg1 != Reg0) 662 } else if (Reg0 != Reg1) {
|
H A D | ARMFastISel.cpp | 2857 unsigned Reg1 = getRegForValue(Src1Value); local 2858 if (Reg1 == 0) return false; 2871 .addReg(Reg1);
|
H A D | ARMISelDAGToDAG.cpp | 3481 unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg(); local 3505 SDValue T1 = CurDAG->getCopyToReg(Sub1, dl, Reg1, Sub1, T0.getValue(1)); 3521 SDValue T1 = CurDAG->getCopyFromReg(Chain, dl, Reg1, MVT::i32,
|
H A D | ARMBaseInstrInfo.cpp | 2562 unsigned Reg1 = UseMI->getOperand(OpIdx).getReg(); local 2568 .addReg(Reg1, getKillRegState(isKill))
|
/freebsd-10.2-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetRegisterInfo.h | 81 bool contains(unsigned Reg1, unsigned Reg2) const { argument 82 return MC->contains(Reg1, Reg2);
|
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 1308 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); 1312 printRegName(O, Reg1); 1321 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); 1325 printRegName(O, Reg1); 1372 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_1); 1376 printRegName(O, Reg1); 1417 unsigned Reg1 = MRI.getSubReg(Reg, ARM::dsub_2); 1421 printRegName(O, Reg1);
|
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 394 unsigned Reg1 = Reg; local 399 .addReg(Reg1, RegState::Kill) 438 unsigned Reg1 = Reg; local 444 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0)
|
H A D | PPCInstrInfo.cpp | 175 unsigned Reg1 = MI->getOperand(1).getReg(); local 182 if (Reg0 == Reg1) { 201 .addReg(Reg1, getKillRegState(Reg1IsKill)) 208 MI->getOperand(2).setReg(Reg1);
|
/freebsd-10.2-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenRegisters.cpp | 1131 CodeGenRegister *Reg1 = Registers[i]; local 1134 if (TopoSigs.test(Reg1->getTopoSig())) 1136 TopoSigs.set(Reg1->getTopoSig()); 1138 const CodeGenRegister::SubRegMap &SRM1 = Reg1->getSubRegs(); 1144 if (Reg1 == Reg2) 1155 // OK Reg1:IdxPair == Reg3. Find the index with Reg:Idx == Reg3. 1156 CodeGenSubRegIndex *Idx3 = Reg1->getSubRegIndex(Reg3);
|
/freebsd-10.2-release/contrib/llvm/lib/MC/ |
H A D | MCDwarf.cpp | 957 unsigned Reg1 = Instr.getRegister(); local 961 Streamer.AddComment(Twine("Reg1 ") + Twine(Reg1)); 965 Streamer.EmitULEB128IntValue(Reg1);
|
/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 5236 unsigned Reg1 = Op1->getReg(); local 5238 unsigned Rt = MRI->getEncodingValue(Reg1); 5248 unsigned NewReg = MRI->getMatchingSuperReg(Reg1, ARM::gsub_0,
|