Searched refs:Q5 (Results 1 - 9 of 9) sorted by relevance
| /freebsd-10.2-release/lib/msun/src/ |
| H A D | s_expm1.c | 42 * R1(z) ~ 1.0 + Q1*z + Q2*z**2 + Q3*z**3 + Q4*z**4 + Q5*z**5
47 * Q5 = -6.2843505682382617102E-9;
51 * | 1.0+Q1*z+...+Q5*z - R1(z) | <= 2
128 Q5 = -2.01099218183624371326e-07; /* BE8AFDB7 6E09C32D */ variable
186 r1 = one+hxs*(Q1+hxs*(Q2+hxs*(Q3+hxs*(Q4+hxs*Q5))));
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| /freebsd-10.2-release/lib/msun/bsdsrc/ |
| H A D | b_tgamma.c | 107 #define Q5 5.12449347980666221336054633184e-03 macro
254 q = Q0 +z*(Q1+z*(Q2+z*(Q3+z*(Q4+z*(Q5+z*(Q6+z*(Q7+z*Q8)))))));
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| /freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 112 SP::Q5, SP::Q13, ~0U, ~0U,
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| /freebsd-10.2-release/contrib/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 119 Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7,
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| /freebsd-10.2-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 429 case ARM::Q4: case ARM::Q5: case ARM::Q6: case ARM::Q7:
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| /freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1678 .Case("v5", IsVec128 ? AArch64::Q5 : AArch64::D5)
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| /freebsd-10.2-release/contrib/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 1039 ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7,
1058 ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12,
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| /freebsd-10.2-release/contrib/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1022 AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7
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| /freebsd-10.2-release/contrib/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 3024 case ARM::Q5: return ARM::D10;
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