/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMFeatures.h | 22 inline bool isV8EligibleForIT(InstrType *Instr, int BLXOperandIndex = 0) { argument 23 switch (Instr->getOpcode()) { 73 return Instr->getOperand(2).getReg() != ARM::PC; 78 return Instr->getOperand(0).getReg() != ARM::PC; 80 return Instr->getOperand(BLXOperandIndex).getReg() != ARM::PC; 82 return Instr->getOperand(0).getReg() != ARM::PC && 83 Instr->getOperand(2).getReg() != ARM::PC; 86 return Instr->getOperand(0).getReg() != ARM::PC && 87 Instr->getOperand(1).getReg() != ARM::PC;
|
H A D | ARMBaseInstrInfo.cpp | 2284 const MachineInstr &Instr = *I; local 2286 if (Instr.modifiesRegister(ARM::CPSR, TRI) || 2287 Instr.readsRegister(ARM::CPSR, TRI)) 2361 const MachineInstr &Instr = *I; local 2362 for (unsigned IO = 0, EO = Instr.getNumOperands(); 2364 const MachineOperand &MO = Instr.getOperand(IO); 2378 switch (Instr.getOpcode()) { 2381 CC = (ARMCC::CondCodes)Instr.getOperand(IO - 1).getImm();
|
H A D | ARMFastISel.cpp | 2783 for (unsigned Instr = 0; Instr != NumInstrsEmitted; ++Instr) { 2785 bool isLsl = (0 == Instr) && !isSingleInstr; 2789 bool isKill = 1 == Instr;
|
/freebsd-10.2-release/contrib/llvm/lib/Transforms/Utils/ |
H A D | BypassSlowDivision.cpp | 84 Instruction *Instr = J; local 85 Value *Dividend = Instr->getOperand(0); 86 Value *Divisor = Instr->getOperand(1); 141 PHINode *QuoPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); 144 PHINode *RemPhi = SuccessorBuilder.CreatePHI(Instr->getType(), 2); 148 // Replace Instr with appropriate phi node 150 Instr->replaceAllUsesWith(QuoPhi); 152 Instr->replaceAllUsesWith(RemPhi); 153 Instr->eraseFromParent(); 192 Instruction *Instr local [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/R600/ |
H A D | R600OptimizeVectorRegisters.cpp | 62 MachineInstr *Instr; member in class:__anon2595::RegSeqInfo 65 RegSeqInfo(MachineRegisterInfo &MRI, MachineInstr *MI) : Instr(MI) { 67 for (unsigned i = 1, e = Instr->getNumOperands(); i < e; i+=2) { 68 MachineOperand &MO = Instr->getOperand(i); 69 unsigned Chan = Instr->getOperand(i + 1).getImm(); 79 return RSI.Instr == Instr; 179 unsigned Reg = RSI->Instr->getOperand(0).getReg(); 180 MachineBasicBlock::iterator Pos = RSI->Instr; 184 unsigned SrcVec = BaseRSI->Instr [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreLowerThreadLocal.cpp | 78 createReplacementInstr(ConstantExpr *CE, Instruction *Instr) { argument 79 IRBuilder<true,NoFolder> Builder(Instr); 148 } else if (Instruction *Instr = dyn_cast<Instruction>(WU)) { 149 Instruction *NewInst = createReplacementInstr(CE, Instr); 150 Instr->replaceUsesOfWith(CE, NewInst);
|
/freebsd-10.2-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAG.h | 254 MachineInstr *Instr; // Alternatively, a MachineInstr. local 312 : Node(node), Instr(0), OrigNode(0), SchedClass(0), NodeNum(nodenum), 326 : Node(0), Instr(instr), OrigNode(0), SchedClass(0), NodeNum(nodenum), 339 : Node(0), Instr(0), OrigNode(0), SchedClass(0), NodeNum(BoundaryID), 362 assert(!Instr && "Setting SDNode of SUnit with MachineInstr!"); 369 assert(!Instr && "Reading SDNode of SUnit with MachineInstr!"); 375 bool isInstr() const { return Instr; } 381 Instr = MI; 388 return Instr;
|
H A D | LiveIntervalAnalysis.h | 185 bool isNotInMIMap(const MachineInstr* Instr) const { 186 return !Indexes->hasIndex(Instr);
|
/freebsd-10.2-release/contrib/llvm/lib/MC/ |
H A D | MCDwarf.cpp | 900 const MCCFIInstruction &Instr); 951 const MCCFIInstruction &Instr) { 955 switch (Instr.getOperation()) { 957 unsigned Reg1 = Instr.getRegister(); 958 unsigned Reg2 = Instr.getRegister2(); 974 unsigned Reg = Instr.getRegister(); 986 Instr.getOperation() == MCCFIInstruction::OpAdjustCfaOffset; 993 CFAOffset += Instr.getOffset(); 995 CFAOffset = -Instr.getOffset(); 1009 Streamer.AddComment(Twine("Reg ") + Twine(Instr 950 EmitCFIInstruction(MCStreamer &Streamer, const MCCFIInstruction &Instr) argument 1106 const MCCFIInstruction &Instr = Instrs[i]; local [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Transforms/Vectorize/ |
H A D | LoopVectorize.cpp | 229 virtual void scalarizeInstruction(Instruction *Instr); 232 virtual void vectorizeMemoryInstruction(Instruction *Instr, 358 virtual void scalarizeInstruction(Instruction *Instr); 359 virtual void vectorizeMemoryInstruction(Instruction *Instr, 1032 Instruction *Instr = dyn_cast<Instruction>(V); local 1033 bool NewInstr = (Instr && Instr->getParent() == LoopVectorBody); 1196 void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr, argument 1199 LoadInst *LI = dyn_cast<LoadInst>(Instr); 1200 StoreInst *SI = dyn_cast<StoreInst>(Instr); 1334 scalarizeInstruction(Instruction *Instr) argument [all...] |
/freebsd-10.2-release/contrib/llvm/include/llvm-c/ |
H A D | Core.h | 2344 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC); 2354 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr); 2357 void LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute); 2358 void LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index, 2360 void LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index, 2448 LLVMValueRef Instr); 2449 void LLVMPositionBuilderBefore(LLVMBuilderRef Builder, LLVMValueRef Instr); 2453 void LLVMInsertIntoBuilder(LLVMBuilderRef Builder, LLVMValueRef Instr); 2454 void LLVMInsertIntoBuilderWithName(LLVMBuilderRef Builder, LLVMValueRef Instr,
|
/freebsd-10.2-release/contrib/llvm/lib/IR/ |
H A D | Core.cpp | 1751 Instruction *Instr = unwrap<Instruction>(Inst); local 1752 BasicBlock::iterator I = Instr; 1753 if (++I == Instr->getParent()->end()) 1759 Instruction *Instr = unwrap<Instruction>(Inst); local 1760 BasicBlock::iterator I = Instr; 1761 if (I == Instr->getParent()->begin()) 1787 unsigned LLVMGetInstructionCallConv(LLVMValueRef Instr) { argument 1788 Value *V = unwrap(Instr); 1796 void LLVMSetInstructionCallConv(LLVMValueRef Instr, unsigned CC) { argument 1797 Value *V = unwrap(Instr); 1805 LLVMAddInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument 1815 LLVMRemoveInstrAttribute(LLVMValueRef Instr, unsigned index, LLVMAttribute PA) argument 1825 LLVMSetInstrParamAlignment(LLVMValueRef Instr, unsigned index, unsigned align) argument 1884 LLVMPositionBuilder(LLVMBuilderRef Builder, LLVMBasicBlockRef Block, LLVMValueRef Instr) argument 1891 LLVMPositionBuilderBefore(LLVMBuilderRef Builder, LLVMValueRef Instr) argument 1909 LLVMInsertIntoBuilder(LLVMBuilderRef Builder, LLVMValueRef Instr) argument 1913 LLVMInsertIntoBuilderWithName(LLVMBuilderRef Builder, LLVMValueRef Instr, const char *Name) argument [all...] |
/freebsd-10.2-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenTarget.cpp | 330 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); local 331 assert(Instr && "Missing target independent instruction"); 332 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 333 InstrsByEnum.push_back(Instr);
|
H A D | InstrInfoEmitter.cpp | 402 const CodeGenInstruction *Instr = NumberedInstructions[i]; local 403 InstrNames.add(Instr->TheDef->getName()); 415 const CodeGenInstruction *Instr = NumberedInstructions[i]; local 416 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
|
H A D | CodeGenDAGPatterns.cpp | 2907 Record *Instr = II->first; local 2909 PatternToMatch(Instr, 2910 Instr->getValueAsListInit("Predicates"), 2914 Instr->getValueAsInt("AddedComplexity"), 2915 Instr->getID()));
|
/freebsd-10.2-release/contrib/llvm/tools/llvm-stress/ |
H A D | llvm-stress.cpp | 672 Instruction *Instr = *it; local 673 BasicBlock *Curr = Instr->getParent(); 674 BasicBlock::iterator Loc= Instr; 676 Instr->moveBefore(Curr->getTerminator()); 678 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
|
/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 1218 const MachineInstr &Instr = *I; local 1219 unsigned IOpC = Instr.getOpcode(); 1222 Instr.modifiesRegister(PPC::CR0, TRI) || 1223 Instr.readsRegister(PPC::CR0, TRI))) 1235 ((Instr.getOperand(1).getReg() == SrcReg && 1236 Instr.getOperand(2).getReg() == SrcReg2) || 1237 (Instr.getOperand(1).getReg() == SrcReg2 && 1238 Instr.getOperand(2).getReg() == SrcReg))) {
|
/freebsd-10.2-release/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineAddSub.cpp | 157 FAddCombine(InstCombiner::BuilderTy *B) : Builder(B), Instr(0) {} 181 Instruction *Instr; member in class:__anon2731::FAddCombine 459 // Input Instr I Factor AddSub0 AddSub1 513 Instr = I; 674 Result = ConstantFP::get(Instr->getType(), 0.0); 775 NewInstr->setDebugLoc(Instr->getDebugLoc()); 781 NewInstr->setFastMathFlags(Instr->getFastMathFlags()); 829 return Coeff.getValue(Instr->getType()); 845 return createFMul(OpndVal, Coeff.getValue(Instr->getType()));
|
/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 3575 MachineInstr *Instr = &*RI; local 3578 isRedundantFlagInstr(CmpInstr, SrcReg, SrcReg2, CmpValue, Instr)) { 3579 Sub = Instr; 3583 if (Instr->modifiesRegister(X86::EFLAGS, TRI) || 3584 Instr->readsRegister(X86::EFLAGS, TRI)) { 3590 if (!Movr0Inst && Instr->getOpcode() == X86::MOV32r0 && 3591 Instr->registerDefIsDead(X86::EFLAGS, TRI)) { 3592 Movr0Inst = Instr; 3616 const MachineInstr &Instr = *I; local 3617 bool ModifyEFLAGS = Instr 3707 MachineInstr *Instr = &*InsertI; local [all...] |
/freebsd-10.2-release/contrib/llvm/lib/Analysis/IPA/ |
H A D | InlineCost.cpp | 1022 Instruction *Instr = CS.getInstruction(); local 1023 if (InvokeInst *II = dyn_cast<InvokeInst>(Instr)) { 1026 } else if (isa<UnreachableInst>(++BasicBlock::iterator(Instr)))
|