Searched refs:I16 (Results 1 - 4 of 4) sorted by relevance

/freebsd-10.2-release/sys/isa/
H A Dpnpparse.c44 #define I16(p) ((p)[0] + ((p)[1] << 8)) macro
45 #define I32(p) (I16(p) + (I16((p)+2) << 16))
105 if (I16(res) == 0) {
113 I16(res));
114 config->ic_irqmask[config->ic_nirq] = I16(res);
154 I16(res + 1),
155 I16(res + 3) + res[6]-1,
159 I16(res + 1);
161 I16(re
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/freebsd-10.2-release/contrib/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1598 I16, enumerator in enum:AtomicSz
1812 Opc = AtomicOpcTbl[Op][I16];
/freebsd-10.2-release/contrib/binutils/opcodes/
H A Dmips-opc.c96 #define I16 INSN_MIPS16 macro
698 {"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, 0, I16 },
/freebsd-10.2-release/contrib/binutils/gas/config/
H A Dtc-arm.c15256 TCE(ssat16, 6a00f30, f3200000, 3, (RRnpc, I16, RRnpc), ssat16, t_ssat16),
15979 shl_imm should accept I8 I16 I32 I64,
16020 /* Comparison. Type I8 I16 I32 F32. */
16030 /* Add/sub take types I8 I16 I32 I64 F32. */
16036 /* VMUL takes I8 I16 I32 F32 P8. */
16086 /* Right shift narrowing. Types accepted I16 I32 I64. */
16110 /* Dyadic, narrowing insns. Types I16 I32 I64. */
16140 /* VMOVN. Types I16 I32 I64. */
16169 /* VCLZ. Types I8 I16 I32. */

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