Searched refs:ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (Results 1 - 10 of 10) sorted by relevance

/freebsd-10.2-release/sys/dev/drm2/radeon/
H A Dnid.h85 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro
H A Drv770d.h354 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro
H A Drv770.c145 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
222 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
H A Dni.c823 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
892 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
H A Dsid.h94 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro
H A Devergreen.c1253 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
1336 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
H A Dr600.c905 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
993 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
H A Dsi.c2508 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
2581 WREG32(VM_L2_CNTL, ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE |
H A Devergreend.h720 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro
H A Dr600d.h584 #define ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE (1 << 9) macro

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