Searched refs:DMA_RB_CNTL (Results 1 - 8 of 8) sorted by relevance

/freebsd-10.2-release/sys/dev/drm2/radeon/
H A Dni.c1265 rb_cntl = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);
1267 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, rb_cntl);
1270 rb_cntl = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);
1272 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, rb_cntl);
1320 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl);
1353 WREG32(DMA_RB_CNTL + reg_offset, rb_cntl | DMA_RB_ENABLE);
1462 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);
1464 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);
1467 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);
1469 WREG32(DMA_RB_CNTL
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H A Dnid.h631 #define DMA_RB_CNTL 0xd000 macro
H A Dr600.c1372 tmp = RREG32(DMA_RB_CNTL);
1374 WREG32(DMA_RB_CNTL, tmp);
2340 u32 rb_cntl = RREG32(DMA_RB_CNTL);
2345 WREG32(DMA_RB_CNTL, rb_cntl);
2383 WREG32(DMA_RB_CNTL, rb_cntl);
2419 WREG32(DMA_RB_CNTL, rb_cntl | DMA_RB_ENABLE);
H A Dsi.c2248 tmp = RREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET);
2250 WREG32(DMA_RB_CNTL + DMA0_REGISTER_OFFSET, tmp);
2253 tmp = RREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET);
2255 WREG32(DMA_RB_CNTL + DMA1_REGISTER_OFFSET, tmp);
H A Dsid.h1012 #define DMA_RB_CNTL 0xd000 macro
H A Devergreen.c2518 tmp = RREG32(DMA_RB_CNTL);
2520 WREG32(DMA_RB_CNTL, tmp);
H A Devergreend.h2036 #define DMA_RB_CNTL 0xd000 macro
H A Dr600d.h606 #define DMA_RB_CNTL 0xd000 macro

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