Searched refs:BaseOffs (Results 1 - 13 of 13) sorted by relevance
/freebsd-10.2-release/contrib/llvm/lib/Transforms/Scalar/ |
H A D | CodeGenPrepare.cpp | 830 (BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) && 852 if (BaseOffs) 853 OS << (NeedPlus ? " + " : "") << BaseOffs, NeedPlus = true; 972 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale; 1116 AddrMode.BaseOffs += ConstantOffset; 1122 AddrMode.BaseOffs -= ConstantOffset; 1131 AddrMode.BaseOffs += ConstantOffset; 1156 AddrMode.BaseOffs += ConstantOffset; 1180 AddrMode.BaseOffs [all...] |
/freebsd-10.2-release/contrib/llvm/lib/CodeGen/ |
H A D | BasicTargetTransformInfo.cpp | 147 AM.BaseOffs = BaseOffset; 158 AM.BaseOffs = BaseOffset;
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H A D | TargetLoweringBase.cpp | 1346 if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) 1358 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. 1363 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed.
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/freebsd-10.2-release/contrib/llvm/lib/Analysis/ |
H A D | BasicAliasAnalysis.cpp | 283 DecomposeGEPExpression(const Value *V, int64_t &BaseOffs, argument 289 BaseOffs = 0; 350 BaseOffs += TD->getStructLayout(STy)->getElementOffset(FieldNo); 357 BaseOffs += TD->getTypeAllocSize(*GTI)*CIdx->getSExtValue(); 377 BaseOffs += IndexOffset.getSExtValue()*Scale;
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/freebsd-10.2-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1627 return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs); 1633 AM.BaseOffs%4 == 0; 1640 return isImmUs(AM.BaseOffs); 1643 return AM.Scale == 1 && AM.BaseOffs == 0; 1648 return isImmUs2(AM.BaseOffs); 1651 return AM.Scale == 2 && AM.BaseOffs == 0; 1655 return isImmUs4(AM.BaseOffs); 1658 return AM.Scale == 4 && AM.BaseOffs == 0;
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/freebsd-10.2-release/contrib/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 1121 /// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg 1123 /// If BaseOffs is zero, there is no base offset. 1129 int64_t BaseOffs; 1132 AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {}
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/freebsd-10.2-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1651 if (AM.BaseOffs <= -(1LL << 13) || AM.BaseOffs >= (1LL << 13)-1) {
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/freebsd-10.2-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 7760 if (AM.BaseOffs <= -(1LL << 16) || AM.BaseOffs >= (1LL << 16)-1) 7772 if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed. 7777 if (AM.HasBaseReg || AM.BaseOffs) // 2*r+r or 2*r+i is not allowed.
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/freebsd-10.2-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 1961 // BaseGV + BaseOffs + BaseReg + Scale*ScaleReg 1970 if (AM.BaseOffs || AM.HasBaseReg || AM.Scale)
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/freebsd-10.2-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 330 if (!isInt<20>(AM.BaseOffs))
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/freebsd-10.2-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 7075 AM.BaseOffs = Offset->getSExtValue(); 7083 AM.BaseOffs = -Offset->getSExtValue();
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/freebsd-10.2-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 10458 if (!isLegalAddressImmediate(AM.BaseOffs, VT, Subtarget)) 10474 if (AM.BaseOffs)
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/freebsd-10.2-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 13890 if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL)) 13908 Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1))
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