Searched refs:link_width_cntl (Results 1 - 4 of 4) sorted by relevance

/freebsd-10.1-release/sys/dev/drm2/radeon/
H A Drv770.c1221 u32 link_width_cntl, lanes, speed_cntl, tmp; local
1249 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
1250 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
1251 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
1252 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
1253 if (link_width_cntl & LC_RENEGOTIATION_SUPPORT) {
1254 lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT;
1255 link_width_cntl &= ~(LC_LINK_WIDTH_MASK |
1257 link_width_cntl |= lanes | LC_RECONFIG_NOW |
1259 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
[all...]
H A Dr300.c471 uint32_t link_width_cntl, mask; local
506 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
508 if ((link_width_cntl & RADEON_PCIE_LC_LINK_WIDTH_RD_MASK) ==
512 link_width_cntl &= ~(RADEON_PCIE_LC_LINK_WIDTH_MASK |
516 link_width_cntl |= mask;
517 WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
518 WREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL, (link_width_cntl |
522 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
523 while (link_width_cntl == 0xffffffff)
524 link_width_cntl
530 u32 link_width_cntl; local
[all...]
H A Dr600.c4138 u32 link_width_cntl, mask, target_reg; local
4177 link_width_cntl = RREG32_PCIE_P(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
4179 if ((link_width_cntl & RADEON_PCIE_LC_LINK_WIDTH_RD_MASK) ==
4183 if (link_width_cntl & R600_PCIE_LC_UPCONFIGURE_DIS)
4186 link_width_cntl &= ~(RADEON_PCIE_LC_LINK_WIDTH_MASK |
4190 link_width_cntl |= mask;
4192 WREG32_PCIE_P(RADEON_PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
4198 if (link_width_cntl & R600_PCIE_LC_RENEGOTIATION_SUPPORT)
4199 link_width_cntl |= R600_PCIE_LC_RENEGOTIATE_EN | R600_PCIE_LC_UPCONFIGURE_SUPPORT;
4201 link_width_cntl |
4220 u32 link_width_cntl; local
4255 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp; local
[all...]
H A Devergreen.c3696 u32 link_width_cntl, speed_cntl, mask; local
3730 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
3731 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
3732 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);
3751 link_width_cntl = RREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL);
3754 link_width_cntl |= LC_UPCONFIGURE_DIS;
3756 link_width_cntl &= ~LC_UPCONFIGURE_DIS;
3757 WREG32_PCIE_P(PCIE_LC_LINK_WIDTH_CNTL, link_width_cntl);

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