Searched refs:asi (Results 1 - 20 of 20) sorted by relevance

/freebsd-10.1-release/sys/sparc64/include/
H A Dcpufunc.h32 #include <machine/asi.h>
63 #define casa(rs1, rs2, rd, asi) ({ \
67 : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \
71 #define casxa(rs1, rs2, rd, asi) ({ \
75 : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \
94 o ## _nc(caddr_t va, int asi) \
97 __asm __volatile("wr %2, 0, %%asi;" #o " [%1] %%asi, %0"\
98 : "=r" (r) : "r" (va), "r" (asi)); \
107 #define LD_GENERIC(va, asi, o
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/freebsd-10.1-release/sys/sparc64/sparc64/
H A Dsupport.S32 #include <machine/asi.h>
51 * operation, asi or not. It is possible to write an asi independent function
52 * but this would require 2 expensive wrs in the main loop to switch %asi.
55 * the same (empty or non-empty). It is up to the caller to set %asi.
208 * void ascopy(u_long asi, vm_offset_t src, vm_offset_t dst, size_t len)
211 wr %o0, 0, %asi
212 _MEMCPY(%o2, %o1, %o3, a, %asi, a, %asi)
221 wr %o0, 0, %asi
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H A Dexception.S62 #include <machine/asi.h>
93 #define TTE_SET_BIT(r1, r2, r3, bit, a, asi) \
95 LD(x, a) [r1] asi, r2 ; \
97 CAS(x, a) [r1] asi, r2, r3 ; \
102 #define TTE_SET_REF(r1, r2, r3, a, asi) TTE_SET_BIT(r1, r2, r3, TD_REF, a, asi)
103 #define TTE_SET_W(r1, r2, r3, a, asi) TTE_SET_BIT(r1, r2, r3, TD_W, a, asi)
113 #define SPILL(storer, base, size, asi) \
114 storer %l0, [base + (0 * size)] asi ; \
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H A Dinterrupt.S30 #include <machine/asi.h>
74 wr %g0, ASI_SDB_INTR_R, %asi
75 ldxa [%g0 + AA_SDB_INTR_D0] %asi, %g3
76 ldxa [%g0 + AA_SDB_INTR_D1] %asi, %g4
77 ldxa [%g0 + AA_SDB_INTR_D2] %asi, %g5
H A Dmp_locore.S31 #include <machine/asi.h>
108 wr %g0, ASI_IMMU, %asi
109 stxa %l5, [%g0 + AA_IMMU_TAR] %asi
125 wr %g0, ASI_DMMU, %asi
126 stxa %l4, [%g0 + AA_DMMU_TAR] %asi
132 wr %g0, ASI_IMMU, %asi
151 stxa %l4, [%g0 + AA_IMMU_TAR] %asi
158 stxa %l4, [%g0 + AA_IMMU_TAR] %asi
251 wr %g0, ASI_DMMU, %asi
254 stxa %l4, [%g0 + AA_DMMU_TAR] %asi
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H A Dswtch.S32 #include <machine/asi.h>
338 wr %g0, ASI_BLK_S, %asi
339 stda %f0, [%o0 + (0 * 64)] %asi
340 stda %f16, [%o0 + (1 * 64)] %asi
341 stda %f32, [%o0 + (2 * 64)] %asi
342 stda %f48, [%o0 + (3 * 64)] %asi
H A Dlocore.S30 #include <machine/asi.h>
H A Dzeus.c33 #include <machine/asi.h>
H A Ddb_hwwatch.c34 #include <machine/asi.h>
H A Dcheetah.c40 #include <machine/asi.h>
H A Dpmap.c320 uint32_t asi; local
462 #define PATCH_ASI(addr, asi) do { \
467 addr[0] |= EIF_IMM((asi), 13); \
471 #define PATCH_LDD(addr, asi) do { \
476 addr[0] |= EIF_F3_IMM_ASI(asi); \
508 asi = ASI_N;
512 asi = ASI_PHYS_USE_EC;
519 PATCH_ASI(tl1_dmmu_miss_patch_asi_1, asi);
525 PATCH_ASI(tl1_dmmu_prot_patch_asi_1, asi);
531 PATCH_ASI(tl1_immu_miss_patch_asi_1, asi);
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H A Dmp_exception.S30 #include <machine/asi.h>
H A Dbus_machdep.c114 #include <machine/asi.h>
H A Dmp_machdep.c81 #include <machine/asi.h>
H A Diommu.c100 #include <machine/asi.h>
/freebsd-10.1-release/lib/libc/sparc64/sys/
H A D__sparc_utrap_gen.S95 ! Restore %asi and %ccr from the passed tstate
101 wr %l4, 0, %asi
/freebsd-10.1-release/crypto/openssl/crypto/bn/asm/
H A Dsparcv9a-mont.pl155 rd %asi,%o7 ! save %asi
163 wr %g0,$ASI_FL16_P,%asi ! setup %asi for 16-bit FP loads
170 stx %o7,[%sp+$bias+$frame+48] ! save %asi
204 ldda [%o4+2]%asi,$ba
206 ldda [%o4+0]%asi,$bb
208 ldda [%o4+6]%asi,$bc
210 ldda [%o4+4]%asi,$bd
214 ldda [%sp+$bias+$frame+6]%asi,
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/freebsd-10.1-release/sys/cddl/contrib/opensolaris/common/atomic/sparc64/
H A Dopensolaris_atomic.S33 #include <machine/asi.h>
/freebsd-10.1-release/contrib/binutils/gas/config/
H A Dtc-sparc.c2571 int asi = 0;
2573 /* Parse an asi. */
2576 if (! parse_keyword_arg (sparc_encode_asi, &s, &asi))
2584 if (! parse_const_expr_arg (&s, &asi))
2589 if (asi < 0 || asi > 255)
2595 opcode |= ASI (asi);
2648 if (strncmp (s, "%asi", 4) != 0)
2873 things like %asi, etc. but continuing that route through to the end
2562 int asi = 0; local
/freebsd-10.1-release/sys/boot/sparc64/loader/
H A Dmain.c60 #include <machine/asi.h>

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